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Alipour, Afshin (ORCID:0000000263252067)

Publications and source records attributed to Alipour, Afshin (ORCID:0000000263252067).

Atom-resolved imaging with a silicon tip integrated into an on-chip scanning tunneling microscope

Limited throughput is a shortcoming of the Scanning Tunneling Microscope (STM), particularly when used for atomically precise lithography. To address this issue, we have developed an on-chip STM based on Microelectromechanical-Systems (MEMS) technology. The device reported here has one degree of freedom, replacing the Z axis in a conventional STM. The small footprint of the on-chip STM provides a great opportunity to increase STM throughput by incorporating a number of on-chip STMs in an array to realize parallel STM. The tip methodology adopted for the on-chip STM presented here, which is a batch-fabricated Si tip, makes our design conducive to this goal. In this work, we investigate the capability of this on-chip STM with an integrated Si tip for STM imaging. We integrate the on-chip STM into a commercial ultrahigh-vacuum STM system and perform imaging with atomic resolution on par with conventional STMs but at higher scan speeds due to the higher sensitivity of the MEMS actuator relative to a piezotube. The results attest that it is possible to achieve a parallel and high-throughput STM platform, which is a fully batch-fabricated MEMS STM nanopositioner capable of performing atomic-resolution STM imaging.

Instruments & Instrumentation↗

Atomic-resolution lithography with an on-chip scanning tunneling microscope

In this work, atomic-resolution lithography with a Microelectromechanical-System (MEMS) based Scanning Tunneling Microscope (STM) is demonstrated for the first time. The microscope consists of a commercial UltraHigh-Vacuum (UHV) STM whose regular tip is replaced with a 1-Degree-of-Freedom (1-DOF) MEMS nanopositioner. This results in a hybrid STM system where XY-plane motions are provided by the piezotube of the original system and Z-axis motion by the MEMS with a higher bandwidth. Sharp tips made of Pt or W are added to the MEMS devices with postfabrication techniques. With this hybrid system, STM-based lithography is demonstrated on an H-passivated Si (100)-2×1 sample under UHV condition. Results prove the capability of the hybrid STM system for atomic-scale lithography. This capability, paired with the small footprint of the MEMS device, makes this approach a candidate for building a high-throughput parallel STM lithography platform by incorporating an array of 1-DOF MEMS devices that perform lithography in parallel.

Alipour, Afshin (ORCID:0000000263252067)↗