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Barth, Kurt

Publications and source records attributed to Barth, Kurt.

The effect of remnant CdSe layers on the performance of CdSeTe/CdTe photovoltaic devices

Thin film CdTe-based photovoltaic devices have achieved high efficiency above 22 %. The recent improvement in efficiency is due to Se alloying in the CdTe absorbers to form a CdSeTe/CdTe structure. The subsequent band gap grading increases the short circuit current density. The Se can be introduced by depositing a precursor thin film of either CdSe or a CdSeTe alloy and then diffusing the Se into the CdTe during the high temperature cadmium chloride activation process. Using CdSe is preferred because it is easier to control the Se concentration. However, during fabrication of the CdSeTe/CdTe devices, the CdSe thickness needs to be precisely controlled to prevent the retention of a CdSe remnant layer after the activation treatment. Retention of a remnant CdSe layer causes a dramatic reduction in device efficiency. In this work, we show that the reduction in efficiency is caused by a number of factors. The remnant CdSe layer is n-type which moves the position of the p-n junction. Also, it is widely thought that the CdSe remnants are photo-inactive. In this work, we clarify that the individual CdSe grains are actually highly photo-active. However, the grain sizes in the CdSe remnant and the adjacent CdSeTe layer are very small resulting in a high grain boundary area. Although the grain boundaries are passivated with chlorine, cathodoluminescence imaging and electrical measurements show that this is only partially effective. Also, EQE measurements show that the remnant CdSe causes parasitic absorption. Overall, the remnant CdSe layer causes a reduction in short circuit current density and device efficiency. The thickness of the CdSe precursor layer and the cadmium chloride activation process conditions must be precisely optimised to ensure that all the CdSe is consumed and inter-diffused to form the CdSeTe alloy for highest efficiency devices.

CdSe remnant↗

Modeling of the effectiveness of novel edge seal designs for fast, low‐Cap‐Ex manufacturing

Abstract In the manufacturing of photovoltaic (PV) modules, the lamination process can take up to 20 min to complete. In this work, new lamination processes are being developed, and have been prototyped, which hope to be able to cut this time down to as little as 30 s. This could provide significant savings in the cost of lamination equipment, floor space, and energy. PV modules are expected to have a lifespan exceeding 20 to 30 years. For moisture‐sensitive PV technologies, the edge seal between the two layers of glass can be the weakest point of its reliability. There is an inherent challenge when evaluating edge seal materials due to their low permeation rates. As part of Colorado State University's Photovoltaic Research and Development 2, work at the National Renewable Energy Laboratory has developed models to evaluate edge seal configurations in glass‐glass PV modules. Here, this new manufacturing process is evaluated for long‐term moisture durability. Different edge seal design options within glass–glass PV modules are explored. Most of these designs are targeting a superstrate on glass configuration, e.g CdTe, but some designs could be used on conventional crystalline Si cells. Using COMSOL finite element simulation software, we investigated the edge seal and interlayer design configurations containing silicone perimeter edge adhesive, desiccated polyisobutylene‐based edge seal, air, and polyolefin while integrating climate conditions equivalent to a hot and humid environment such as Miami, Florida. We found optimized configurations that will allow the module to prevent moisture ingress over 50 years minimizing the amount of time and material used while utilizing polymers that are easily dispensed.

14 SOLAR ENERGY↗

Analysis of CdTe photovoltaic cells for ambient light energy harvesting

This paper investigates the suitability of CdTe photovoltaic cells to be used as power sources for wireless sensors located in buildings. We fabricate and test a CdTe photovoltaic cell with a transparent conducting oxide front contact that provides for high photocurrents and low series resistance at low light intensities and measures the photovoltaic response of this cell across five orders of magnitude of AM1.5G light intensity. Efficiencies of 10% and 17.1% are measured under ~1 W m -2 AM1.5G and LED irradiance respectively, the highest values for a CdTe device under ambient lighting measured to date. We use our results to assess the potential of CdTe for internet of things devices from an optoelectronic, as well as a techno-economic perspective, considering its established manufacturing know-how, potential for low-cost, proven long-term stability and issues around the use of cadmium.

14 SOLAR ENERGY↗

Light-Induced Metastabilities in Highly Efficient MZO/CdSeTe/CdTe Thin Film Solar Cells

Metastability effects have been investigated in high efficiency MZO/CdSeTe/CdTe solar cells. Two different preconditioning procedures have been studied to recover the performance of the devices. These preconditioning procedures include light soaking, annealing and cooling down the device under different atmospheric conditions. J-V curves before any preconditioning showed a `S` shaped behavior and disappears after 15 minutes of light soaking under 1000 Wm-2. Both Atmospheric and Vacuum preconditioning showed similar recovery of the device performance. However, this recovery only lasts for 3 days when the devices were kept under vacuum in the dark.

14 SOLAR ENERGY↗

Influence of Process Parameters and Absorber Thickness on Efficiency of Polycrystalline CdSeTe/CdTe Thin Film Solar Cells

Graded absorbers devices with with CdSe 0.4 Te 0.6 (molar basis) and CdTe were fabricated. CdCl 2 treatment time, post-deposition CdCl 2 anneal time and thicknesses of CdSeTe and CdTe layers were varied. Photoluminescence and electrical measurements were performed on the fabricated devices. Results revealed that the individual thicknesses of CdSeTe and CdTe is critical to overall efficiency of the devices. Device fabricated on substrate with 0.5 μm CdSeTe, 3 μm CdTe with rest of process parameters kept unchanged, produced an efficiency of 20.14%. We report highest device efficiency among academia and research institutions.

Shimpi, Tushar↗