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Berkun, Andrew C.

Publications and source records attributed to Berkun, Andrew C..

Pattern Generator for Bench Test of Digital Boards

All efforts to develop electronic equipment reach a stage where they need a board test station for each board. The SMAP digital system consists of three board types that interact with each other using interfaces with critical timing. Each board needs to be tested individually before combining into the integrated digital electronics system. Each board needs critical timing signals from the others to be able to operate. A bench test system was developed to support test of each board. The test system produces all the outputs of the control and timing unit, and is delivered much earlier than the timing unit. Timing signals are treated as data. A large file is generated containing the state of every timing signal at any instant. This file is streamed out to an IO card, which is wired directly to the device-under-test (DUT) input pins. This provides a flexible test environment that can be adapted to any of the boards required to test in a standalone configuration. The problem of generating the critical timing signals is then transferred from a hardware problem to a software problem where it is more easily dealt with.

Berkun, Andrew C.↗

Measuring Input Thresholds on an Existing Board

A critical PECL (positive emitter-coupled logic) interface to Xilinx interface needed to be changed on an existing flight board. The new Xilinx input interface used a CMOS (complementary metal-oxide semiconductor) type of input, and the driver could meet its thresholds typically, but not in worst-case, according to the data sheet. The previous interface had been based on comparison with an external reference, but the CMOS input is based on comparison with an internal divider from the power supply. A way to measure what the exact input threshold was for this device for 64 inputs on a flight board was needed. The measurement technique allowed an accurate measurement of the voltage required to switch a Xilinx input from high to low for each of the 64 lines, while only probing two of them. Directly driving an external voltage was considered too risky, and tests done on any other unit could not be used to qualify the flight board. The two lines directly probed gave an absolute voltage threshold calibration, while data collected on the remaining 62 lines without probing gave relative measurements that could be used to identify any outliers. The PECL interface was forced to a long-period square wave by driving a saturated square wave into the ADC (analog to digital converter). The active pull-down circuit was turned off, causing each line to rise rapidly and fall slowly according to the input s weak pull-down circuitry. The fall time shows up as a change in the pulse width of the signal ready by the Xilinx. This change in pulse width is a function of capacitance, pulldown current, and input threshold. Capacitance was known from the different trace lengths, plus a gate input capacitance, which is the same for all inputs. The pull-down current is the same for all inputs including the two that are probed directly. The data was combined, and the Excel solver tool was used to find input thresholds for the 62 lines. This was repeated over different supply voltages and temperatures to show that the interface had voltage margin under all worst case conditions. Gate input thresholds are normally measured at the manufacturer when the device is on a chip tester. A key function of this machine was duplicated on an existing flight board with no modifications to the nets to be tested, with the exception of changes in the FPGA program.

Kuperman, Igor↗

FPGA Sequencer for Radar Altimeter Applications

A sequencer for a radar altimeter provides accurate attitude information for a reliable soft landing of the Mars Science Laboratory (MSL). This is a field-programmable- gate-array (FPGA)-only implementation. A table loaded externally into the FPGA controls timing, processing, and decision structures. Radar is memory-less and does not use previous acquisitions to assist in the current acquisition. All cycles complete in exactly 50 milliseconds, regardless of range or whether a target was found. A RAM (random access memory) within the FPGA holds instructions for up to 15 sets. For each set, timing is run, echoes are processed, and a comparison is made. If a target is seen, more detailed processing is run on that set. If no target is seen, the next set is tried. When all sets have been run, the FPGA terminates and waits for the next 50-millisecond event. This setup simplifies testing and improves reliability. A single vertex chip does the work of an entire assembly. Output products require minor processing to become range and velocity. This technology is the heart of the Terminal Descent Sensor, which is an integral part of the Entry Decent and Landing system for MSL. In addition, it is a strong candidate for manned landings on Mars or the Moon.

Berkun, Andrew C.↗

Inexpensive Implementation of Many Strain Gauges

It has been proposed to develop arrays of strain gauges as arrays of ordinary metal film resistors and associated electronic readout circuitry on printed circuit boards or other suitable substrates. This proposal is a by-product of a development of instrumentation utilizing metal film resistors on printed-circuit boards to measure temperatures at multiple locations. In the course of that development, it was observed that in addition to being sensitive to temperature, the metal film resistors were also sensitive to strains in the printed-circuit boards to which they were attached. Because of the low cost of ordinary metal film resistors (typically <$0.01 apiece at 2007 prices), the proposal could enable inexpensive implementation of arrays of many (e.g., 100 or more) strain gauges, possibly concentrated in small areas. For example, such an array could be designed for use as a computer keyboard with no moving parts, as a device for sensing the shape of an object resting on a surface, or as a device for measuring strains at many points on a mirror, a fuel tank, an airplane wing, or other large object. Ordinarily, the effect of strain on resistance would be regarded as a nuisance in a temperature-measuring application, and the effect of temperature on resistance would be regarded as a nuisance in a strain-measuring application. The strain-induced changes in resistance of the metal film resistors in question are less than those of films in traditional strain gauges. The main novel aspect of present proposal lies in the use of circuitry affording sufficient sensitivity to measure strain plus means for compensating for the effect of temperature. For an array of metal film resistors used as proposed, the readout circuits would include a high-accuracy analog-to-digital converter fed by a low noise current source, amplifier chain, and an analog multiplexer chain. Corrections would be provided by use of high-accuracy calibration resistors and a temperature sensor. By use of such readout circuitry, it would be possible to read the resistances of as many as 100 fixed resistors in a time interval of 1 second at a resolution much greater than 16 bits. The readout data would be processed, along with temperature calibration data, to deduce the strain on the printed-circuit board or other substrate in the areas around the resistors. It should also be possible to also deduce the temperature from the readings.

Berkun, Andrew C.↗