Engineering topics
Publications and source records attributed to Bokhari, S. H..
Three methods of reducing the diameters of computer networks by adding additional processor to processor links under the constraint that no more than one I/O port be added to each processor are discussed. This is equivalent to adding edges to a given graph under the constraint that the degree of any node be increased, at most, by one.
A mesh connected array of size N = two to the Kth power, K an integer, can be augmented by adding at most one edge per node such that it can perform a shuffle-exchange of size N/2 in constant time. A shuffle-exchange of size N is performed on this augmented array in constant time. This is done by combining the available perfect shuffle of size N/2 with the existing nearest neighbor connections of the mesh. By carefully scheduling the different permutations that are composed in order to achieve the shuffle, the time required is reduced to 5 steps, which is optimal for this network.
Three methods of augmenting computer networks by adding at most one link per processor are discussed: (1) A tree of N nodes may be augmented such that the resulting graph has diameter no greater than 4log sub 2((N+2)/3)-2. Thi O(N(3)) algorithm can be applied to any spanning tree of a connected graph to reduce the diameter of that graph to O(log N); (2) Given a binary tree T and a chain C of N nodes each, C may be augmented to produce C so that T is a subgraph of C. This algorithm is O(N) and may be used to produce augmented chains or rings that have diameter no greater than 2log sub 2((N+2)/3) and are planar; (3) Any rectangular two-dimensional 4 (8) nearest neighbor array of size N = 2(k) may be augmented so that it can emulate a single step shuffle-exchange network of size N/2 in 3(t) time steps.
The problem of finding the maximum of a set of values stored one/processor on an n x n array of processors is analyzed. The array has a time-shared global bus in addition to conventional processor-processor links. A two-phase algorithm for finding the maximum is presented that uses conventional links during the first phase and the global bus during the second. This algorithm is faster than algorithms that use either only the global bus or only the conventional links. Two types of interconnection patterns (the eighth nearest neighbor and the fourth nearest neighbor) are analyzed. In both cases it is shown that the time required to find the maximum using the two-phase algorithm is 0(n to the 2/3-power) assuming the propagation speed of the global bus to be a constant independent of the size of the array. In the case where the propagation speed is logarithmic in the number of processors, the time to find the maximum is 0(/n-squared log n/1/3), for both types of arrays. Extensions to q-dimensional arrays show that the two-phase algorithm is superior for any fixed value of q.