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Boyer, R. S.

Publications and source records attributed to Boyer, R. S..

Investigation, Development, and Evaluation of Performance Proving for Fault-tolerant Computers

A number of methodologies for verifying systems and computer based tools that assist users in verifying their systems were developed. These tools were applied to verify in part the SIFT ultrareliable aircraft computer. Topics covered included: STP theorem prover; design verification of SIFT; high level language code verification; assembly language level verification; numerical algorithm verification; verification of flight control programs; and verification of hardware logic.

Levitt, K. N.↗

A Formal Semantics for the SRI Hierarchical Program Design Methodology

A formal statement of what it means to use (a subset of) the methodology is presented. It is formally defined that some specified module exists and what it means to say that another module is paid correctly implemented on top of it. No attention is to motivation, either of the methodology or of the formal development of it. Concentration is entirely upon mathematical succinctness and precision. A discussion is presented of how to use certain INTERLISP programs which implement the formal definitions. Among these are a program which generates Floyd like verification conditions sufficient to imply the correctness of a module implementation.

Boyer, R. S.↗

On Why It Is Impossible to Prove that the BDX90 Dispatcher Implements a Time-sharing System

The Software Implemented Fault Tolerance SIFT system, is written in PASCAL except for about a page of machine code. The SIFT system implements a small time sharing system in which PASCAL programs for separate application tasks are executed according to a schedule with real time constraints. The PASCAL language has no provision for handling the notion of an interrupt such as the B930 clock interrupt. The PASCAL language also lacks the notion of running a PASCAL subroutine for a given amount of time, suspending it, saving away the suspension, and later activating the suspension. Machine code was used to overcome these inadequacies of PASCAL. Code which handles clock interrupts and suspends processes is called a dispatcher. The time sharing/virtual machine idea is completely destroyed by the reconfiguration task. After termination of the reconfiguration task, the tasks run by the dispatcher have no relation to those run before reconfiguration. It is impossible to view the dispatcher as a time-sharing system implementing virtual BDX930s running concurrently when one process can wipe out the others.

Boyer, R. S.↗

Defining of the BDX930 Assembly Language

A definition of the BDX930 assembly language is presented. Various definition problems and suggested solutions are included. A class of defined recognizers based on boolean valued nowrecursive functions is employed in preprocessing.

Boyer, R. S.↗

The use of a formal simulator to verify a simple real time control program

The authors present an initial and elementary investigation of the formal specification and mechanical verification of programs that interact with environments. They describe a mechanical proof that a simple, real time control program keeps a vehicle on a straightline course in a variable crosswind. To formalize the specification they define a mathematical function which models the interaction of the program and its environment. They then state and proved two theorems about this function: the simulated vehicle never gets farther than three units away from the intended course, and it comes to the course if the wind ever remains steady for at least four sampling units.

Boyer, R. S.↗