Engineering topics

Burkhart, C

Publications and source records attributed to Burkhart, C.

6 records

DOE OSTI2011

A Hierarchical Control Architecture for a PEBB-Based ILC Marx Modulator

The idea of building power conversion systems around Power Electronic Building Blocks (PEBBs) was initiated by the U.S. Office of Naval Research in the mid 1990s. A PEBB-based design approach is advantageous in terms of power density, modularity, reliability, and serviceability. It is obvious that this approach has much appeal for pulsed power conversion including the International Linear Collider (ILC) klystron modulator application. A hierarchical control architecture has the inherent capability to support the integration of PEBBs. This has already been successfully demonstrated in a number of industrial applications in the recent past. This paper outlines the underlying concepts of a hierarchical control architecture for a PEBB-based Marx-topology ILC klystron modulator. The control in PEBB-based power conversion systems can be functionally partitioned into (three) hierarchical layers; system layer, application layer, and PEBB layer. This has been adopted here. Based on such a hierarchical partition, the interfaces are clearly identified and defined and, consequently, are easily characterised. A conceptual design of the hardware manager, executing low-level hardware oriented tasks, is detailed. In addition, the idea of prognostics is briefly discussed.

43 PARTICLE ACCELERATORS↗

DOE OSTI2011

Final Design of the SLAC P2 Marx Klystron Modulator

The SLAC P2 Marx has been under development for two years, and follows on the P1 Marx as an alternative to the baseline klystron modulator for the International Linear Collider. The P2 Marx utilizes a redundant architecture, air-insulation, a control system with abundant diagnostic access, and a novel nested droop correction scheme. This paper is an overview of the design of this modulator. There are several points of emphasis for the P2 Marx design. First, the modulator must be compatible with the ILC two-tunnel design. In this scheme, the modulator and klystron are located within a service tunnel with limited access and available footprint for a modulator. Access to the modulator is only practical from one side. Second, the modulator must have high availability. Robust components are not sufficient alone to achieve availability much higher than 99%. Therefore, redundant architectures are necessary. Third, the modulator must be relatively low cost. Because of the large number of stations in the ILC, the investment needed for the modulator components is significant. High-volume construction techniques which take advantage of an economy of scale must be utilized. Fourth, the modulator must be simple and efficient to maintain. If a modulator does become inoperable, the MTTR must be small. Fifth, even though the present application for the modulator is for the ILC, future accelerators can also take advantage of this development effort. The hardware, software, and concepts developed in this project should be designed such that further development time necessary for other applications is minimal.

43 PARTICLE ACCELERATORS↗

DOE OSTI2011

Development of Modulator Pulse Stability Measurement Device and Test Results at SLAC

In this paper, the development of a pulse stability measurement device is presented. The measurement accuracy is better than 250uV, about 4.2ppm of a typical 60V input pulse. Pulse signals up to +/- 80V peak can be measured. The device works together with an oscilloscope. The primary function of the measurement device is to provide a precision offset, such that variations in the flattop of the modulator voltage pulse can be accurately resolved. The oscilloscope records the difference between the pulse flattop and the reference for a series of waveforms. The scope math functions are utilized to calculate the rms variations over the series. The frequency response of the device is characterized by the measured cutoff frequency of about 6.5MHz. In addition to detailing the design and calibration of the precision pulse stability device, measurements of SLAC line-type linac modulators and recently developed induction modulators will be presented. Factors affecting pulse stability will be discussed.

43 PARTICLE ACCELERATORS↗

DOE OSTI2011

The ILC P2 Marx and Application of the Marx Topology to Future Accelerators

The SLAC P2 Marx is under development as the linac klystron modulator for the ILC. This modulator builds upon the success of the P1 Marx, which is currently undergoing lifetime evaluation. While the SLAC P2 Marx's (henceforth, 'P2 Marx') target application is the ILC, characteristics of the Marx topology make it equally well-suited for operation at different parameter ranges; for example, increased pulse repetition frequency, increased output current, longer pulse width, etc. Marx parameters such as the number of cells, cell capacitance, and component selection can be optimized for the application. This paper provides an overview of the P2 Marx development. In addition, the scalability of the Marx topology to other long-pulse parameter ranges is discussed.

43 PARTICLE ACCELERATORS↗

DOE OSTI2011

A Solid-State Nanosecond Beam Kicker Modulator Based on the DSRD Switch

A fast solid-state beam kicker modulator is under development at the SLAC National Accelerator Laboratory. The program goal is to develop a modulator that will deliver 4 ns, {+-}5 kV pulses to the ATF2 damping ring beam extraction kicker. The kicker is a 50 {Omega}, bipolar strip line, 60 cm long, fed at the downstream end and terminated at the upstream end. The bunch spacing in the ring is 5.6 ns, bunches are removed from the back end of the train, and there is a gap of 103.6 ns before the next train. The modulator design is based on an opening switch topology that uses Drift Step Recovery Diodes as the opening switches. The design and results of the modulator development are discussed. There are many applications that benefit from very fast high power switching. However, at MW power levels and nanosecond time scales, solid state options are limited. One option, the Drift Step Recovery Diode (DSRD) has been demonstrated as capable of blocking thousands of volts and switching in nanosecond to sub-nanosecond ranges. When used as an opening switch, the DSRD exhibits a very fast turn off transient. The process is described in detail by its pioneers in [5,6]. In essence, charge is pumped into and then extracted from the DSRD under pulsed conditions. The turn off transient occurs precisely when the pumped charge is equal to the extracted charge and the DSRD is switched off. At the SLAC National Accelerator Laboratory, a DSRD is being used as an opening switch in the development of a fast kicker modulator. The modulator is designed to create {+-}5kV pulses with <1ns rise and fall time on a 50{Omega} strip line kicker. As is common in beam optics, the absence of power in the kicker before and after the pulse is very important. The entire {+-}5kV kicker modulator is composed of two identical 5kV pulsing circuits, each with its own DSRD component. This paper describes the modulator topology and the status of tests on one of the two 5kV pulse circuits.

43 PARTICLE ACCELERATORS↗

DOE OSTI2011

Analysis of the Ultra-fast Switching Dynamics in a Hybrid MOSFET/Driver

The turn-on dynamics of a power MOSFET during ultra-fast, {approx} ns, switching are discussed in this paper. The testing was performed using a custom hybrid MOSFET/Driver module, which was fabricated by directly assembling die-form components, power MOSFET and drivers, on a printed circuit board. By using die-form components, the hybrid approach substantially reduces parasitic inductance, which facilitates ultra-fast switching. The measured turn on time of the hybrid module with a resistive load is 1.2 ns with an applied voltage of 1000 V and drain current of 33 A. Detailed analysis of the switching waveforms reveals that switching behavior must be interpreted differently in the ultra-fast regime. For example, the gate threshold voltage to turn on the device is observed to increase as the switching time decreases. Further analysis and simulation of MOSFET switching behavior shows that the minimum turn on time scales with the product of the drain-source on resistance and drain-source capacitance, R{sub DS(on)}C{sub OSS}. This information will be useful in power MOSFET selection and gate driver design for ultra-fast switching applications.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗