A multi-channel demultiplexer/demodulator architecture, simulation and implementation
The development of multichannel demultiplexer/demodulator is described in which the aim is to optimize bandwidth and hardware efficiency. Attention is given to the simulation and performance analysis of the proposed architectures for the demultiplexer and the demodulator. The project is presently in the test phase, and it is suggested that the present results demonstrate the feasibility and efficiency of incorporating on-board processing in commercial communications satellites.
Cangiane, P.↗