Engineering topics
Publications and source records attributed to Chesney, James R..
A high rate Level Zero Processing system is currently being prototyped at NASA/Goddard Space Flight Center (GSFC). Based on state-of-the-art VLSI technology and the functional component approach, the new system promises capabilities of handling multiple Virtual Channels and Applications with a combined data rate of up to 20 Megabits per second (Mbps) at low cost.
The general architecture and the principal functions of the Macintosh II based Telemetry and Command system, presently under development, are described, with attention given to custom telemetry cards, input/output interfaces, and the icon driven user interface. The MacTac is a low-cost, transportable, easy to use, compact system designed to meet the requirements specified by the Consultative Committeee for Space Data Systems while remaining flexible enough to support a wide variety of other user specific telemetry processing requirements, such as TDM data. In addition, the MacTac can accept or generate forward data (such as spacecraft commands), calculate and append a Polynomial Check Code, and output these data to NASCOM to provide full Telemetry and Command capability.
A Transportable Telemetry Workstation (TTW) has been developed to meet the need for reduction in size and cost per station while maintaining high performance specifications in distributed system environments. The TTW consists primarily of the adaptation of NASA's Goddard Space Flight Center VLSI components and system architecture to a personal computer and its architecture. The overall system, the architecture, the TTW Controller Card, TTW Synchronizer Card, custom backplane bus, and system software structure are described.
JPL is involved in the TOPEX/Poseidon mission, a project to study ocean circulation from an orbiting satellite. One subsystem, called the NASCOM Front End Processor (NFEP), is tasked with accepting spacecraft telemetry data relayed via the NASCOM Network and performing certain functions before passing it to the Telemetry and Command. This paper describes the NFEP system architecture and the TOPEX-NFEP configuration.
The prototype architecture and implementation of a high-speed level zero processing (LZP) system are discussed. Due to the new processing algorithm and VLSI technology, the prototype LZP system features compact size, low cost, high processing throughput, and easy maintainability and increased reliability. Though extensive control functions have been done by hardware, the programmability of processing tasks makes it possible to adapt the system to different data formats and processing requirements. It is noted that the LZP system can handle up to 8 virtual channels and 24 sources with combined data volume of 15 Gbytes per orbit. For greater demands, multiple LZP systems can be configured in parallel, each called a processing channel and assigned a subset of virtual channels. The telemetry data stream will be steered into different processing channels in accordance with their virtual channel IDs. This super system can cope with a virtually unlimited number of virtual channels and sources. In the near future, it is expected that new disk farms with data rate exceeding 150 Mbps will be available from commercial vendors due to the advance in disk drive technology.
The architecture, components, and technical approach for a Space Station era mass storage system prototype are described. The primary data storage needs call for such functions as line outage recording, rate buffering, data archiving, and level zero type processing. The prototype mass storage system hardware will be configurable to support three modes of operation at up to 300 Mbps. The system architecture consists of two distinct components: a configurable high-level mass storage control system and a basic storage kernal.
The paper is concerned with the problem of appropriate data handling standards that allow the interchange of individual elements in a noninterfering manner and accomodate increasing performance needs without requiring total system replacement. An example is presented where an implementation (in software) is replaced by a new technology (VLSI circuitry), and it is shown how this approach can point the way to the next generation of telemetry handling systems.