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Dolan, B.

Publications and source records attributed to Dolan, B..

The Space Debris Sensor Experiment

The Space Debris Sensor (SDS) is a NASA Class 1E technology demonstration external payload aboard the International Space Station (ISS). With approximately one square meter of detection area, the SDS is attached to the European Space Agency Columbus module facing the ISS velocity vector with minimal obstruction from ISS hardware. The SDS is the first flight demonstration of the Debris Resistive/Acoustic Grid Orbital NASA-Navy Sensor (DRAGONS) technology developed and matured over 10 years by the NASA Orbital Debris Program Office (ODPO), in concert with the DRAGONS consortium, to provide information on the sub-millimeter scale orbital debris environment. The SDS demonstrated the capacity to read 4 resistive grids at 1 Hz, 40 acoustic sensors at 500 kHz, and record and downlink impact data to the ground. Observable and derived data from the SDS could provide information to models that are critical to understanding risks the small debris environment poses to spacecraft in low Earth orbit. The technology demonstrated by the SDS is a major step forward in monitoring and characterizing the space debris environment. This paper will address the technical performance of the SDS during its operational lifetime and its realization of technical and scientific goals. The SDS was intended to operate for 3 years; however, the payload incurred multiple anomalies during its operational life. Subsequently termed “Anomaly #1,” the first was the symptomatic loss of low data rate 1553 channel command and telemetry. The second, Anomaly #2, was loss of all low- and medium-data rate (Ethernet) telemetry. Anomaly #2 proved to be unrecoverable, leading to loss of the payload after approximately 26 days on-board the ISS. Therefore, this paper also addresses the anomalies that occurred during operation of the SDS, their attribution, and their resolution. Lessons learned are described when relevant to anomaly identification, attribution, and resolution.

Anz-Meador, P.

Buried Oxide Densification for Low Power, Low Voltage CMOS Applications

Special technology and circuit architecture are of growing interest for implementation of circuits which operate at low supply voltages and consume low power levels without sacrificing performance[1]. Use of thin buried oxide SOI substrates is a primary approach to simultaneously achieve these goals. A significant aspect regarding SIMOX SOI for low voltage, low power applications is the reliability and performance of the thin buried oxide. In addition, when subjected to high total dose irradiation, the silicon islands within the BOX layer of SIMOX can store charges and significantly effect the back channel threshold voltages of devices. Thus, elimination of the islands within the buried oxide (BOX) layer is preferred in order to prevent leakage through these conductive islands and charge build-up within the buried oxide layer. A differential (2-step) ramp rate as applied to full and 100 nm BOX SIMOX was previously reported to play a significant role in the stoichiometry and island formation within the buried layer[2]. This paper focus is on the properties of a thin (120nm) buried oxide as a function of the anneal ramp rate and the temperature of anneal. In this research, we have found an improvement in the buried oxide stoichiometry with the use of a slower, singular ramp rate for specified thin buried oxides, with slower ramp rates and higher temperatures of anneal suggested for reducing the presence of Si islands within the BOX layer.

Allen, L. P.