A π-type Compensated Ferrite-Free Domino IPT System for DC Circuit Breakers
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Engineering topics
Publications and source records attributed to Dongye, Zhonghao.
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This article introduces a 4 kV/120 A solid-state dc circuit breaker (DCCB) based on discrete SiC mosfets. The DCCB is designed in a five-layer tower structure. Each layer consists of a circular main conduction branch and an attached gate driver. There are two primary benefits of the proposed DCCB. First, it reduces conduction loss with multiple devices in parallel. Second, it achieves an ultrafast response speed with SiC mosfets. Moreover, the gate drivers of the DCCB are powered by a domino inductive power transfer (IPT) system. It achieves the load-independent constant-voltage output characteristics, which means the outputs are immune to load variations. Additionally, an IPT system prototype is implemented to test the power transfer performance. At 500-kHz frequency, the total output power reaches 15.73 W, which is sufficient to power on five gate drivers, with a peak transfer efficiency of 75.4%. The IPT system is tested to power a 4 kV/120 A DCCB prototype. It validates that the DCCB is effective to turn off 120 A current within 3.5 μs.
The high voltage thyristor is widely used in high voltage DC (HVDC) grids due to its large current capability. Recently, the high voltage thyristor is implemented to produce a high current in the HVDC circuit breaker (CB) testing process. Unfortunately, the reverse recovery process (RRP) of a thyristor could induce significant turn-off overvoltage and power losses, jeopardizing the safety of the devices. The existing models of a thyristor cannot describe such hard-switching transient accurately. Therefore, this paper divides this process into four stages based on the physical mechanism and proposes a novel cosine exponential (CE), simulating the voltage and current of the thyristor with analytical equations, which are derived from the equivalent circuit. Moreover, the extraction procedure of the proposed model is illustrated in this paper. Finally, we develop an HVDC CB test platform to validate the proposed model. Experimental results show that the proposed CE model can accurately predict the overvoltage with a relative error of less than 8% at various current varying rates.