Combining Video Memory Operations
Designs of video random-access memory (VRAM) integrated circuits operating under control by external logic circuits simplified according to concept of combining two memory operations performed separately heretofore. Eliminates need for DRAM-refresh timers and counters, reducing amount of circuitry needed to control VRAM thereby reducing time needed to design VRAM. Simplification also reduces time needed to redesign DRAM-refresh logic circuitry when adapting VRAM design to another VRAM for which timing specifications different. Concept can be applied to VRAM clocking data out to display unit continuously.
Kania, Michael J.↗