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Feldman, Catherine

Publications and source records attributed to Feldman, Catherine.

Dimming the Lights: 2D Simulations of Deflagrations of Hybrid C/O/Ne White Dwarfs Using FLASH

The dimmest and most numerous outlier of the Type Ia supernova population, the Type Iax event, is increasingly being found in the results of observational campaigns. There is currently no single accepted model to describe these events. This 2D study explores the viability of modeling Type Iax events as a hybrid C/O/Ne white dwarf progenitor undergoing a deflagration using the multiphysics software FLASH. This hybrid was created using the stellar evolution code MESA, and its C-depleted core and mixed structure have demonstrated lower yields than traditional C/O progenitors in previous deflagration-to-detonation studies. To generate a sample, 30 “realizations” of this simulation were performed, the only difference being the shape of the initial match head used to start the deflagration. Consistent with earlier work, these realizations produce the familiar hot dense bound remnant surrounded by sparse ejecta. Our results indicate that the majority of the star remains unburned (∼70%) and bound (>90%). Our realizations produce total ejecta yields on the order of 10 −2 –10 −1 M ☉ , ejected 56 Ni yields on the order of 10 −4 –10 −2 M ☉ , and ejecta kinetic energies on the order of 10 48 –10 49 erg. Compared to yields inferred from recent observations of the dimmest Type Iax events—SN 2007qd, SN 2008ha, SN 2010ae, SN 2019gsc, SN 2019muj, SN 2020kyg, and SN 2021fcg—our simulation produces comparable 56 Ni yields but too-small total yields and kinetic energies. Reignition of the remnant is also seen in some realizations.

Hydrodynamical simulations↗

On Using Linux Kernel Huge Pages with FLASH, an Astrophysical Simulation Code

We present efforts at improving the performance of FLASH, a multi-scale, multi-physics simulation code principally for astrophysical applications, by using huge pages on Ookami, an HPE Apollo 80 A64FX platform. FLASH is written principally in modern Fortran and makes use of the PARAMESH library to manage a block-structured adaptive mesh. We explored options for enabling the use of huge pages with several compilers, but we were only able to successfully use huge pages when compiling with the Fujitsu compiler. As a result, the use of huge pages substantially reduced the number of translation lookaside buffer misses, but overall performance gains were marginal.

79 ASTRONOMY AND ASTROPHYSICS↗

Experiences with Porting the FLASH Code to Ookami, an HPE Apollo 80 A64FX Platform

We present initial experiences with running the community simulation code FLASH, developed at the University of Chicago for multi-scale multi-physics applications, on Ookami, a technology testbed featuring the A64FX processor developed by Fujitsu. Our effort focused largely on running FLASH “right out of the box” to see which combinations of compilers and software implementations (e.g. MPI) allowed the code to run with minimal modification. FLASH was one application in a larger effort to deploy Ookami; it served as a test for different versions of newly installed software, and as a cornerstone for the FAQ page of the Ookami website. Here, we report on our results with different compilers and other software, along with our initial scaling results and attempts to utilize the A64FX’s SVE instructions and NUMA architecture. We found that FLASH readily ran with different compilers and MPI implementations, and showed the expected good scaling with no turning. However, more work must be done to fully take advantage of the A64FX’s architectural features and produce a significant speedup for FLASH on Ookami.

79 ASTRONOMY AND ASTROPHYSICS↗

Educating HPC Users in the use of advanced computing technology

We examine a multi-modal approach to educating and training users of an advanced computing technology testbed at the Institute for Advanced Computational Science at Stony Brook University. Ookami provides researchers worldwide with access to 176 Fujitsu A64FX compute nodes, this being the same processor technology powering the Japanese Fugaku supercomputer, the fastest computer in the world since June 2020. However, achieving high-performance on this Arm-based, leadership computing technology requires that users be familiar with details of computer architecture, performance analysis and modeling, and high-performance programming models that are commonly omitted in introductory programming courses. Indeed, regardless of their seniority, many of the testbed users are surprisingly unfamiliar with basic concepts such as vectorization, pipelining, latency/bandwidth, roofline models, computing energy/power, threads, and non-uniform memory access. These same concepts also pervade mainstream x86 technologies, so this is of widespread concern. Due to the national/global nature of our user community that is also very diverse in both discipline and experience, the inability to offer formal classes, and our experience that most people do not tend to read online documentation or training materials in sufficient depth, we have consciously employed multiple approaches that heavily emphasize (online) personal interactions and transfer of skills. Online documentation has been organized around best-practices and FAQs; twice-weekly hackathons and office hours via Zoom enable deep dives by both the team and the user community with multiple broad benefits; a Slack channel provides both real time and archived answers and discussions; and workshops, training and webinars target community needs as they arise. Furthermore, the perspective that these tools are being used in an educational setting rather than just for project communication makes them more effective and contributes to community success.

A64FX↗