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Ferreira, Linda

Publications and source records attributed to Ferreira, Linda.

On-Wafer Measurement of a Multi-Stage MMIC Amplifier with 10 dB of Gain at 475 GHz

JPL has measured and calibrated a WR2.2 waveguide wafer probe from GGB Industries in order to allow for measurement of circuits in the 325-500 GHz range. Circuits were measured, and one of the circuits exhibited 10 dB of gain at 475 GHz. The MMIC circuit was fabricated at Northrop Grumman Corp. (NGC) as part of a NASA Innovative Partnerships Program, using NGC s 35-nm-gatelength InP HEMT process technology. The chip utilizes three stages of HEMT amplifiers, each having two gate fingers of 10 m in width. The circuits use grounded coplanar waveguide topology on a 50- m-thick substrate with through substrate vias. Broadband matching is achieved with coplanar waveguide transmission lines, on-chip capacitors, and open stubs. When tested with wafer probing, the chip exhibited 10 dB of gain at 475 GHz, with over 9 dB of gain from 445-490 GHz. Low-noise amplifiers in the 400-500 GHz range are useful for astrophysics receivers and earth science remote sensing instruments. In particular, molecular lines in the 400-500 GHz range include the CO 4-3 line at 460 GHz, and the CI fine structure line at 492 GHz. Future astrophysics heterodyne instruments could make use of high-gain, low-noise amplifiers such as the one described here. In addition, earth science remote sensing instruments could also make use of low-noise receivers with MMIC amplifier front ends. Present receiver technology typically employs mixers for frequency down-conversion in the 400-500 GHz band. Commercially available mixers have typical conversion loss in the range of 7-10 dB with noise figure of 1,000 K. A low-noise amplifier placed in front of such a mixer would have 10 dB of gain and lower noise figure, particularly if cooled to low temperature. Future work will involve measuring the noise figure of this amplifier.

Samoska, Lorene A.↗

MMIC Amplifiers and Wafer Probes for 350 to 500 GHz

A wireless avionics interface exploits the constrained nature of data networks in flight systems to use a lightweight routing method. This simplified routing means that a processor is not required, and the logic can be implemented as an intellectual property (IP) core in a field-programmable gate array (FPGA). The FPGA can be shared with the flight subsystem application. In addition, the router is aware of redundant subsystems, and can be configured to provide hot standby support as part of the interface. This simplifies implementation of flight applications requiring hot stand - by support. When a valid inbound packet is received from the network, the destination node address is inspected to determine whether the packet is to be processed by this node. Each node has routing tables for the next neighbor node to guide the packet to the destination node. If it is to be processed, the final packet destination is inspected to determine whether the packet is to be forwarded to another node, or routed locally. If the packet is local, it is sent to an Applications Data Interface (ADI), which is attached to a local flight application. Under this scheme, an interface can support many applications in a subsystem supporting a high level of subsystem integration. If the packet is to be forwarded to another node, it is sent to the outbound packet router. The outbound packet router receives packets from an ADI or a packet to be forwarded. It then uses a lookup table to determine the next destination for the packet. Upon detecting a remote subsystem failure, the routing table can be updated to autonomously bypass the failed subsystem.

Samoska, Lorene A.↗

Two-Stage, 90-GHz, Low-Noise Amplifier

A device has been developed for coherent detection of the polarization of the cosmic microwave background (CMB). A two-stage amplifier has been designed that covers 75-110 GHz. The device uses the emerging 35-nm InP HEMT technology recently developed at Northrop Grumman Corporation primarily for use at higher frequencies. The amplifier has more than 18 dB gain and less than 35 K noise figure across the band. These devices have noise less than 30 K at 100 GHz. The development started with design activities at JPL, as well as characterization of multichip modules using existing InP. Following processing, a test campaign was carried out using single-chip modules at 100 GHz. Successful development of the chips will lead to development of multichip modules, with simultaneous Q and U Stokes parameter detection. This MMIC (monolithic microwave integrated circuit) amplifier takes advantage of performance improvements intended for higher frequencies, but in this innovation are applied at 90 GHz. The large amount of available gain ultimately leads to lower possible noise performance at 90 GHz.

Samoska, Lorene A.↗