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Flatley, Thomas P.

Publications and source records attributed to Flatley, Thomas P..

Spacecube: A Family of Reconfigurable Hybrid On-Board Science Data Processors

SpaceCube is a family of Field Programmable Gate Array (FPGA) based on-board science data processing systems developed at the NASA Goddard Space Flight Center (GSFC). The goal of the SpaceCube program is to provide 10x to 100x improvements in on-board computing power while lowering relative power consumption and cost. SpaceCube is based on the Xilinx Virtex family of FPGAs, which include processor, FPGA logic and digital signal processing (DSP) resources. These processing elements are leveraged to produce a hybrid science data processing platform that accelerates the execution of algorithms by distributing computational functions to the most suitable elements. This approach enables the implementation of complex on-board functions that were previously limited to ground based systems, such as on-board product generation, data reduction, calibration, classification, eventfeature detection, data mining and real-time autonomous operations. The system is fully reconfigurable in flight, including data parameters, software and FPGA logic, through either ground commanding or autonomously in response to detected eventsfeatures in the instrument data stream.

reconfigurable computing

Small Rocket/Spacecraft Technology (SMART) Platform

The NASA Goddard Space Flight Center (GSFC) and the Department of Defense Operationally Responsive Space (ORS) Office are exercising a multi-year collaborative agreement focused on a redefinition of the way space missions are designed and implemented. A much faster, leaner and effective approach to space flight requires the concerted effort of a multi-agency team tasked with developing the building blocks, both programmatically and technologically, to ultimately achieve flights within 7-days from mission call-up. For NASA, rapid mission implementations represent an opportunity to find creative ways for reducing mission life-cycle times with the resulting savings in cost. This in tum enables a class of missions catering to a broader audience of science participants, from universities to private and national laboratory researchers. To that end, the SMART (Small Rocket/Spacecraft Technology) micro-spacecraft prototype demonstrates an advanced avionics system with integrated GPS capability, high-speed plug-and-playable interfaces, legacy interfaces, inertial navigation, a modular reconfigurable structure, tunable thermal technology, and a number of instruments for environmental and optical sensing. Although SMART was first launched inside a sounding rocket, it is designed as a free-flyer.

Esper, Jaime

On the Hilbert-Huang Transform Data Processing System Development

One of the main heritage tools used in scientific and engineering data spectrum analysis is the Fourier Integral Transform and its high performance digital equivalent - the Fast Fourier Transform (FFT). The Fourier view of nonlinear mechanics that had existed for a long time, and the associated FFT (fairly recent development), carry strong a-priori assumptions about the source data, such as linearity and of being stationary. Natural phenomena measurements are essentially nonlinear and nonstationary. A very recent development at the National Aeronautics and Space Administration (NASA) Goddard Space Flight Center (GSFC), known as the Hilbert-Huang Transform (HHT) proposes a novel approach to the solution for the nonlinear class of spectrum analysis problems. Using the Empirical Mode Decomposition (EMD) followed by the Hilbert Transform of the empirical decomposition data (HT), the HHT allows spectrum analysis of nonlinear and nonstationary data by using an engineering a-posteriori data processing, based on the EMD algorithm. This results in a non-constrained decomposition of a source real value data vector into a finite set of Intrinsic Mode Functions (IMF) that can be further analyzed for spectrum interpretation by the classical Hilbert Transform. This paper describes phase one of the development of a new engineering tool, the HHT Data Processing System (HHTDPS). The HHTDPS allows applying the "T to a data vector in a fashion similar to the heritage FFT. It is a generic, low cost, high performance personal computer (PC) based system that implements the HHT computational algorithms in a user friendly, file driven environment. This paper also presents a quantitative analysis for a complex waveform data sample, a summary of technology commercialization efforts and the lessons learned from this new technology development.

Kizhner, Semion

Pre-Hardware Optimization of Spacecraft Image Processing Algorithms and Hardware Implementation

Spacecraft telemetry rates and telemetry product complexity have steadily increased over the last decade presenting a problem for real-time processing by ground facilities. This paper proposes a solution to a related problem for the Geostationary Operational Environmental Spacecraft (GOES-8) image data processing and color picture generation application. Although large super-computer facilities are the obvious heritage solution, they are very costly, making it imperative to seek a feasible alternative engineering solution at a fraction of the cost. The proposed solution is based on a Personal Computer (PC) platform and synergy of optimized software algorithms, and reconfigurable computing hardware (RC) technologies, such as Field Programmable Gate Arrays (FPGA) and Digital Signal Processors (DSP). It has been shown that this approach can provide superior inexpensive performance for a chosen application on the ground station or on-board a spacecraft.

Kizhner, Semion

Pre-Hardware Optimization of Spacecraft Image Processing Software Algorithms and Hardware Implementation

Spacecraft telemetry rates have steadily increased over the last decade presenting a problem for real-time processing by ground facilities. This paper proposes a solution to a related problem for the Geostationary Operational Environmental Spacecraft (GOES-8) image processing application. Although large super-computer facilities are the obvious heritage solution, they are very costly, making it imperative to seek a feasible alternative engineering solution at a fraction of the cost. The solution is based on a Personal Computer (PC) platform and synergy of optimized software algorithms and re-configurable computing hardware technologies, such as Field Programmable Gate Arrays (FPGA) and Digital Signal Processing (DSP). It has been shown in [1] and [2] that this configuration can provide superior inexpensive performance for a chosen application on the ground station or on-board a spacecraft. However, since this technology is still maturing, intensive pre-hardware steps are necessary to achieve the benefits of hardware implementation. This paper describes these steps for the GOES-8 application, a software project developed using Interactive Data Language (IDL) (Trademark of Research Systems, Inc.) on a Workstation/UNIX platform. The solution involves converting the application to a PC/Windows/RC platform, selected mainly by the availability of low cost, adaptable high-speed RC hardware. In order for the hybrid system to run, the IDL software was modified to account for platform differences. It was interesting to examine the gains and losses in performance on the new platform, as well as unexpected observations before implementing hardware. After substantial pre-hardware optimization steps, the necessity of hardware implementation for bottleneck code in the PC environment became evident and solvable beginning with the methodology described in [1], [2], and implementing a novel methodology for this specific application [6]. The PC-RC interface bandwidth problem for the class of applications with moderate input-output data rates but large intermediate multi-thread data streams has been addressed and mitigated. This opens a new class of satellite image processing applications for bottleneck problems solution using RC technologies. The issue of a science algorithm level of abstraction necessary for RC hardware implementation is also described. Selected Matlab functions already implemented in hardware were investigated for their direct applicability to the GOES-8 application with the intent to create a library of Matlab and IDL RC functions for ongoing work. A complete class of spacecraft image processing applications using embedded re-configurable computing technology to meet real-time requirements, including performance results and comparison with the existing system, is described in this paper.

Kizhner, Semion

An Integrated Architecture for Onboard Spacecraft

As increasingly complex scientific and environmental observation spacecraft are deployed, the burden on the downlink assets, and ground-based systems complexity and cost is becoming a major problem. Already, the limitations of communications bandwidth and processing throughput limit the science data gathering, both in volume and in rate. This poses a dilemma to the scientist experimenter forcing choices between data collection and bandwidth/processing/archiving. Advances in ground based processing and space-to-Earth links have fallen behind the requirements for observation data, at increasing rates, over the last few decades. As NASA achieves its 40th anniversary, the ability to observe and capture phenomena of theoretical and practical interest to life on Earth far outstrips the ability to transfer, process, or store these data. NASA recognizes the need to invest on technological advancements that will enable both the space and ground systems to address the limitations. Spacecraft onboard computing power is a clear one. The capability of creating data products onboard the spacecraft adds a new level of flexibility to address the more demanding observation needs. Current spacecraft computing power is limited and incapable of addressing the needs of the new generation of observation satellites because extensive onboard data processing is required. Traditional spacecraft architectures only collect, package, and transmit to Earth the data acquired by multiple instruments. Conversely, the experience on developing ground data systems shows the need for high performance computing systems to process and create information from the instrumentation data. The expectation is that supercomputing technology is required to enable spacecraft to create information onboard. Moving supercomputing capability onboard spacecraft requires an approach that considers an integrated data architecture. Otherwise, it may simply convert a compute-bound problem into a communications bound problem, as has been shown numerous times in the context of massively parallel architectures. What is left to determine are the technologies that will enable spacecraft high performance computing.

Figueiredo, Marco A.

Design and Early In-flight Performance of the Tropical Rainfall Measuring Mission (TRMM) Power Subsystem

Maryland built the spacecraft in-house with four U.S. instruments and one Japanese instrument, the first space flown Precipitation Radar (PR). The TRMM Observatory was successfully launched from Tanegashima Space Center in Japan on an H-2 Expendable Launch Vehicle on November 27, 1997. This paper presents an overview of the TRMM Power System including its design, testing, and in flight performance for the first 70 days. Finally, key lessons learned are presented. The TRMM power system consists of an 18.1 square meter deployed solar array fabricated by TRW with Tecstar GaAs/Ge cells, two (2) Hughes 50 Ampere-Hour (Ah) Super NiCd' batteries, each with 22 Eagle-Picher cells, and three (3) electronics boxes designed to provide power regulation, battery charge control, and command and telemetry interface.

Moran, Vickie Eakin

More About The PCIO Card

PCIO user's guide presents additional information about design, operation, and programming of PCIO card described in "Interface Circuit for Communication of Telemetric Data" (GSC-13547).

Flatley, Thomas P.

PC-Based Interface Circuit For Communication Of Telemetric Data

PCIO card in input/output interface-circuit card enabling computer based on ISA bus to transmit and receive high-speed, synchronous serial data and clock signals. Designed specifically to plug into IBM PC-AT or compatible computer and to handle input and output of data in packet formats like those of telemetric data streams used throughout NASA and aerospace industry. Reduces amount of auxiliary equipment needed.

Flatley, Thomas P.