Engineering topics

Hayes, Paul J.

Publications and source records attributed to Hayes, Paul J..

4 records

NASA NTRS1994

Graph-Based Dynamic Assignment Of Multiple Processors

Algorithm-to-architecture mapping model (ATAMM) is strategy minimizing time needed to periodically execute graphically described, data-driven application algorithm on multiple data processors. Implemented as operating system managing flow of data and dynamically assigns nodes of graph to processors. Predicts throughput versus number of processors available to execute given application algorithm. Includes rules ensuring application algorithm represented by graph executed periodically without deadlock and in shortest possible repetition time. ATAMM proves useful in maximizing effectiveness of parallel computing systems.

Hayes, Paul J.↗

NASA NTRS1991

Simulator for enhanced ATAMM multiprocessing

A simulator is introduced which follows the rules of the enhanced Algorithm to Architecture Mapping Model (ATAMM) multiprocessing strategy. ATAMM is a method for embedding an algorithm into a multiprocessing system in addition to providing system performance prediction capabilities. A discussion of the inner workings of the Architecture Design and Assessment System (ADAS) hosted simulator is introduced to illustrate how the simulator follows the ATAMM rule set. A sample 5-node algorithm graph is given as an example to illustrate: (1) entering of a graph into the simulator and how to run the graph using a graph entry tool; (2) how to analyze the data; and (3) a comparison of the simulation results with the predicted results from ATAMM.

Andrews, Asa M.↗

NASA NTRS1990

Embedded Multiprocessor Technology for VHSIC Insertion

Viewgraphs on embedded multiprocessor technology for VHSIC insertion are presented. The objective was to develop multiprocessor system technology providing user-selectable fault tolerance, increased throughput, and ease of application representation for concurrent operation. The approach was to develop graph management mapping theory for proper performance, model multiprocessor performance, and demonstrate performance in selected hardware systems.

Hayes, Paul J.↗

NASA NTRS1989

Multiprocessor performance modeling with ADAS

A graph managing strategy referred to as the Algorithm to Architecture Mapping Model (ATAMM) appears useful for the time-optimized execution of application algorithm graphs in embedded multiprocessors and for the performance prediction of graph designs. This paper reports the modeling of ATAMM in the Architecture Design and Assessment System (ADAS) to make an independent verification of ATAMM's performance prediction capability and to provide a user framework for the evaluation of arbitrary algorithm graphs. Following an overview of ATAMM and its major functional rules are descriptions of the ADAS model of ATAMM, methods to enter an arbitrary graph into the model, and techniques to analyze the simulation results. The performance of a 7-node graph example is evaluated using the ADAS model and verifies the ATAMM concept by substantiating previously published performance results.

Hayes, Paul J.↗