Cost models and economical packaging of LSI's
Report discusses mathematical models used to estimate costs of developing and fabricating microcircuits. Second part discusses LSI packaging using tape chip carrier technology.
Himmel, R. P.↗
Engineering topics
Himmel, R. P.
Publications and source records attributed to Himmel, R. P..
Cost savings in LSI fabrication
One year study program was divided into three tasks: to identify costs factors involved in packaged electronic subsystems as function of LSI density and reliability; to select most promising factors that might be modified to reduce costs in high-density packaging; and to investigate cost-saving beam tape technology for producing high-volume discrete-device packages. Results are published in 67 page report.
Himmel, R. P.↗
Design, processing and testing of LSI arrays, hybrid microelectronics task
Mathematical cost models previously developed for hybrid microelectronic subsystems were refined and expanded. Rework terms related to substrate fabrication, nonrecurring developmental and manufacturing operations, and prototype production are included. Sample computer programs were written to demonstrate hybrid microelectric applications of these cost models. Computer programs were generated to calculate and analyze values for the total microelectronics costs. Large scale integrated (LST) chips utilizing tape chip carrier technology were studied. The feasibility of interconnecting arrays of LSU chips utilizing tape chip carrier and semiautomatic wire bonding technology was demonstrated.
Himmel, R. P.↗
Design, processing and testing of LSI arrays: Hybrid microelectronics task
Mathematical cost factors were generated for both hybrid microcircuit and printed wiring board packaging methods. A mathematical cost model was created for analysis of microcircuit fabrication costs. The costing factors were refined and reduced to formulae for computerization. Efficient methods were investigated for low cost packaging of LSI devices as a function of density and reliability. Technical problem areas such as wafer bumping, inner/outer leading bonding, testing on tape, and tape processing, were investigated.
Himmel, R. P.↗
Design, processing and testing of LSI arrays hybrid microelectronics task
Those factors affecting the cost of electronic subsystems utilizing LSI microcircuits were determined and the most efficient methods for low cost packaging of LSI devices as a function of density and reliability were developed.
Himmel, R. P.↗
Contamination control in hybrid microelectronic modules
Thin and thick film test specimens were utilized to study the effects of silicone and epoxy hybrid microcircuit coatings on 0.025 mm diameter aluminum and gold ultrasonic bonds, and 0.051 diameter gold pulsed-thermocompression bonds. Chip-to-substrate and substrate-to-substrate geometries were included. Because sealed packages were utilized, a test pattern design was incorporated that allowed the determination of bond failures by making resistance measurements external to the package after the various environmental tests. All wire bonds were non-destructively pull tested prior to sealing. Tests included the PIN test, temperature cycling, and high temperature storage.
Himmel, R. P.↗
Contamination control in hybrid microelectronic modules. Identification of critical process and contaminants, part 1
Hybrid processes, handling procedures, and materials were examined to identify the critical process steps in which contamination is most likely to occur, to identify the particular contaminants associated with these critical steps, and to propose method for the control of these contaminants.
Himmel, R. P.↗
Contamination Control in Hybrid Microelectronic Modules. Part 1: Identification of Critical Process and Contaminants
Various hybrid processing steps, handling procedures, and materials are examined in an attempt to identify sources of contamination and to propose methods for the control of these contaminants. It is found that package sealing, assembly, and rework are especially susceptible to contamination. Moisture and loose particles are identified as the worst contaminants. The points at which contaminants are most likely to enter the hybrid package are also identified, and both general and specific methods for their detection and control are developed. In general, the most effective controls for contaminants are: clean working areas, visual inspection at each step of the process, and effective cleaning at critical process steps. Specific methods suggested include the detection of loose particles by a precap visual inspection, by preseal and post-seal electrical testing, and by a particle impact noise test. Moisture is best controlled by sealing all packages in a clean, dry, inert atmosphere after a thorough bake-out of all parts.
Himmel, R. P.↗
Contamination control in hybrid microelectronic modules. Part 2: Selection and evaluation of coating materials
The selection, test, and evaluation of organic coating materials for contamination control in hybrid circuits is reported. The coatings were evaluated to determine their suitability for use as a conformal coating over the hybrid microcircuit (including chips and wire bonds) inside a hermetically sealed package. Evaluations included ease of coating application and repair and effect on thin film and thick film resistors, beam leads, wire bonds, transistor chips, and capacitor chips. The coatings were also tested for such properties as insulation resistance, voltage breakdown strength, and capability of immobilizing loose particles inside the packages. The selected coatings were found to be electrically, mechanically, and chemically compatible with all components and materials normally used in hybrid microcircuits.
Himmel, R. P.↗
Contamination control in hybrid microelectronic modules. Part 3: Specifications for coating material and process controls
Resin systems for coating hybrids prior to hermetic sealing are described. The resin systems are a flexible silicone junction resin system and a flexible cycloaliphatic epoxy resin system. The coatings are intended for application to the hybrid after all the chips have been assembled and wire bonded, but prior to hermetic sealing of the package. The purpose of the coating is to control particulate contamination by immobilizing particles and by passivating the hybrid. Recommended process controls for the purpose of minimizing contamination in hybrid microcircuit packages are given. Emphasis is placed on those critical hybrid processing steps in which contamination is most likely to occur.
Himmel, R. P.↗
Contamination control coatings for hybrids
Conductive particles unexpectedly present in hermetically sealed hybrid microcircuit packages pose a high risk of shorting the closely spaced planar conductors within the package, causing failure of the device. The present work evaluates commercially available organic coating materials and determines the most promising ones for protection of complex microcircuits against entrapped particulate contaminants. The candidate materials were exposed to a series of physical and electrical screening tests, the results of which were used as a basis for the final coating selection. Silicones and high-purity epoxies are found to not only display excellent compatibility with microcircuits but to improve the performance of microcircuits as to voltage breakdown between adjacent conductors.
Mastro, A. R.↗