Diagnosis of Factors Impacting Yield in Multilayer Devices for Superconducting Electronics
The ability to localize defects in order to understand failure mechanisms in complex superconducting electronics circuits, while operating at low temperature, does not yet exist. Here, this work applies thermally-induced voltage alteration (TIVA), to a biased superconducting electronics (SCE) circuit at ambient temperature. TIVA is a commonly used, laser-based failure analysis technique developed for silicon-based microelectronics. The non-operational circuit consisted of an arithmetic logic unit (ALU) in a high-frequency test bed designed at HYPRES and fabricated by MIT Lincoln Laboratory using their SFQ5ee process. Localized TIVA signals were correlated with reflected light images at the surface, and these sites were further investigated by scanning electron microscopy imaging of focused ion-beam cross-sections. The areas investigated, where prominent TIVA signals were observed, showed seams in the Nb wiring layers at contacts to Josephson junctions or inductors and/or disrupted junction morphologies. Finally, these results suggest that the TIVA technique can be used at ambient temperature to diagnose fabrication defects that may cause low temperature circuit failure.