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Johnson, Michael

Publications and source records attributed to Johnson, Michael.

At least 19 records

Crystal Structure and Preparation of Li7La3Zr2O12 (LLZO) Solid-State Electrolyte and Doping Impacts on the Conductivity: An Overview

As an essential part of solid-state lithium-ion batteries, solid electrolytes are receiving increasing interest. Among all solid electrolytes, garnet-type Li7La3Zr2O12 (LLZO) has proven to be one of the most promising electrolytes because of its high ionic conductivity at room temperature, low activation energy, good chemical and electrochemical stability, and wide potential window. Since the first report of LLZO, extensive research has been done in both experimental investigations and theoretical simulations aiming to improve its performance and make LLZO a feasible solid electrolyte. These include developing different methods for the synthesis of LLZO, using different crucibles and different sintering temperatures to stabilize the crystal structure, and adopting different methods of cation doping to achieve more stable LLZO with a higher ionic conductivity and lower activation energy. It also includes intensive efforts made to reveal the mechanism of Li ion movement and understand its determination of the ionic conductivity of the material through molecular dynamic simulations. Nonetheless, more insightful study is expected in order to obtain LLZO with a higher ionic conductivity at room temperature and further improve chemical and electrochemical stability, while optimal multiple doping is thought to be a feasible and promising route. This review summarizes recent progress in the investigations of crystal structure and preparation of LLZO, and the impacts of doping on the lithium ionic conductivity of LLZO.

Raju, Md Mozammal (ORCID:0000000319040523)↗

Automation Rover for Extreme Environments

Almost 2,300 years ago the ancient Greeks built the Antikythera automaton. This purely mechanical computer accurately predicted past and future astronomical events long before electronics existed1. Automata have been credibly used for hundreds of years as computers, art pieces, and clocks. However, in the past several decades automata have become less popular as the capabilities of electronics increased, leaving them an unexplored solution for robotic spacecraft. The Automaton Rover for Extreme Environments (AREE) proposes an exciting paradigm shift from electronics to a fully mechanical system, enabling longitudinal exploration of the most extreme environments within the solar system.

automata↗

Centering a DDR Strobe in the Middle of a Data Packet

The Orion CEV Northstar ASIC (application- specific integrated circuit) project required a DDR (double data rate) memory bus driver/receiver (DDR PHY block) to interface with external DDR memory. The DDR interface (JESD79C) is based on a source synchronous strobe (DQS\) that is sent along with each packet of data (DQ). New data is provided concurrently with each edge of strobe and is sent irregularly. In order to capture this data, the strobe needs to be delayed and used to latch the data into a register. A circuit solves the need for training a DDR PRY block by incorporating a PVT-compensated delay element in the strobe path. This circuit takes an external reference clock signal and uses the regular clock to calibrate a known delay through a data path. The compensated delay DQS signal is then used to capture the DQ data in a normal register. This register structure can be configured as a FIFO (first in first out), in order to transfer data from the DDR domain to the system clock domain. This design is different in that it does not rely upon the need for training the system response, nor does it use a PLL (phase locked loop) or a DLL (delay locked loop) to provide an offset of the strobe signal. The circuit is created using standard ASIC building blocks, plus the PVT (process, voltage, and temperature) compensated delay line. The design uses a globally available system clock as a reference, alleviating the need to operate synchronously with the remote memory. The reference clock conditions the PVT compensated delay line to provide a pre-determined amount of delay to any data signal that passes through this delay line. The delay line is programmed in degrees of offset, so that one could think of the clock period representing 360deg of delay. In an ideal environment, delaying the strobe 1/4 of a clock cycle (90deg) would place the strobe in the middle of the data packet. This delayed strobe can then be used to clock the data into a register, satisfying setup and hold requirements of the system.

Johnson, Michael↗

Human and Robotic Space Mission Use Cases for High-Performance Spaceflight Computing

Spaceflight computing is a key resource in NASA space missions and a core determining factor of spacecraft capability, with ripple effects throughout the spacecraft, end-to-end system, and the mission; it can be aptly viewed as a "technology multiplier" in that advances in onboard computing provide dramatic improvements in flight functions and capabilities across the NASA mission classes, and will enable new flight capabilities and mission scenarios, increasing science and exploration return per mission-dollar.

flight computing↗

Human and Robotic Space Mission Use Cases for High-Performance Spaceflight Computing

Spaceflight computing is a key resource in NASA space missions and a core determining factor of spacecraft capability, with ripple effects throughout the spacecraft, end-to-end system, and mission. Onboard computing can be aptly viewed as a "technology multiplier" in that advances provide direct dramatic improvements in flight functions and capabilities across the NASA mission classes, and enable new flight capabilities and mission scenarios, increasing science and exploration return. Space-qualified computing technology, however, has not advanced significantly in well over ten years and the current state of the practice fails to meet the near- to mid-term needs of NASA missions. Recognizing this gap, the NASA Game Changing Development Program (GCDP), under the auspices of the NASA Space Technology Mission Directorate, commissioned a study on space-based computing needs, looking out 15-20 years. The study resulted in a recommendation to pursue high-performance spaceflight computing (HPSC) for next-generation missions, and a decision to partner with the Air Force Research Lab (AFRL) in this development.

use cases↗