Engineering topics

Joshi, Siddhartha

Publications and source records attributed to Joshi, Siddhartha.

2 records

DOE OSTI2019

The ETROC Project: Precision Timing ASIC Development for LGAD-based CMS Endcap Timing Layer (ETL) Upgrade

The ETROC (Endcap Timing Readout Chip) is being developed for the LGAD-based CMS Endcap Timing Layer (ETL) at HL-LHC. The ETL on each side of the interaction region will be instrumented with a two-disk system of MIP-sensitive LGAD silicon devices to be read out by ETROCs for precision timing measurement with down to 30 ps timing resolution. The ETROC is designed to handle a 16 x 16 pixel cell matrix, with each pixel cell being 1.3 mm x 1.3 mm to match the LGAD sensor pixel size. Approximately 15% of the sensors near the highest eta region will experience hadron fluence above 1e15 neq/cm² towards end of operation of HL-LHC, resulting in small signal amplitude with LGAD gain reduced to around 10. For this reason, the front-end design for preamplifier and discriminator has been specifically optimized for the reduced LGAD signals, with enough flexibilities to meet the ETL specific needs for time resolution, power budget and radiation profile.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2019

A Low Power, High Speed Readout for Pixel Detectors Based on an Arbitration Tree

A low-power, high-speed arbitration tree for pixel detector readout is presented. The synchronized, binary tree priority encoder establishes a position dependent priority list at the start of every time frame. Pixels that indicate the presence of data for readout, are sequentially granted access to a shared bus for data transfer to the periphery, without the use of an additional global strobe signal. It can be used for either full frame imaging or zero-suppressed readout, in which case it can simultaneously generate the pixel address. To increase the readout frame rate, the pixel array is subdivided into two halves, which allows interleaved latching of data at the output serializer. The design was implemented in a 65 nm LP-CMOS process for the readout of a 64 x 64 pixel array. Measurement results demonstrate a deadtime-less, full frame imaging rate of ~50 kfps, achieved with a dedicated output for every (32 x 32) 1024 pixels and for a pixel data packet of 11 bits, with no bit errors detected over 1000 frames. The measured energy per bit is 0.94 pJ.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗