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Julie Blystone

Publications and source records attributed to Julie Blystone.

NASA's X-57 High Lift Motor Controller: Detailed Design, Test Results, and Outcomes

NASA's X-57 all-electric aircraft was a research project aimed at investigating lightweight and efficient electric propulsion components. The general approach was to utilize a distributed electric propulsion (DEP) design. An essential component of this design was the High Lift Motor Controller (HLMC), a motor drive which provided power to the High Lift Motors (HLMs) and High Lift Propellers (HLPs) responsible for providing additional thrust for take-off and landing. This paper presents the detailed design, test results, and outcomes from the development of the HLMC, a 14 kW, 1kg, 98.3% efficient, outer mold line (OML) cooled, silicon carbide (SiC) MOSFET-based inverter and controller.

Electric Aircraft↗

Leveraging High-Level Synthesis to Migrate Motor Control Algorithms From Microcontroller to FPGA

As motor control algorithms become increasingly complex, traditional microcontroller-based implementations are reaching computational limits that prevent the controller from operating at the required speed. This paper presents a novel workflow leveraging High-Level Synthesis (HLS) to migrate motor control algorithms from a microcontroller implementation to a Field-Programmable Gate Array (FPGA) implementation. The proposed approach utilizes the free Vitis HLS software to automatically convert Embedded Coder-generated C code from a Simulink model into Hardware Description Language (HDL) code suitable for FPGA deployment.

FPGA↗

Leveraging High-Level Synthesis to Migrate Motor Control Algorithms From Microcontroller to FPGA

As motor control algorithms become increasingly complex, traditional microcontroller-based implementations are reaching computational limits that prevent the controller from operating at the required speed. This paper presents a novel workflow leveraging High-Level Synthesis (HLS) to migrate motor control algorithms from a microcontroller implementation to a Field-Programmable Gate Array (FPGA) implementation. The proposed approach utilizes the free Vitis HLS software to automatically convert Embedded Coder-generated C code from a Simulink model into Hardware Description Language (HDL) code suitable for FPGA deployment.

FPGA↗