Engineering topics

Kapoor, V. J.

Publications and source records attributed to Kapoor, V. J..

15 records

NASA NTRS1993

TlCaBaCuO high Tc superconducting microstrip ring resonators designed for 12 GHz

Microwave properties of sputtered Tl-Ca-Ba-Cu-O thin films were investigated by designing, fabricating, and testing microstrip ring resonators. Ring resonators designed for 12 GHz fundamental resonance frequency, were fabricated and tested. From the unloaded Q values for the resonators, the surface resistance was calculated by separating the conductor losses from the total losses. The penetration depth was obtained from the temperature dependence of resonance frequency, assuming that the shift in resonance frequency is mainly due to the temperature dependence of penetration depth. The effective surface resistance at 12 GHz and 77 K was determined to be between 1.5 and 2.75 mOmega, almost an order lower than Cu at the same temperature and frequency. The effective penetration depth at 0 K is approximately 7000 A.

Subramanyam, G.↗

NASA NTRS1993

Processing, electrical and microwave properties of sputtered Tl-Ca-Ba-Cu-O superconducting thin films

A reproducible fabrication process has been established for TlCaBaCuO thin films on LaAlO3 substrates by RF magnetron sputtering and post-deposition processing methods. Electrical transport properties of the thin films were measured on patterned four-probe test devices. Microwave properties of the films were obtained from unloaded Q measurements of all-superconducting ring resonators. This paper describes the processing, electrical and microwave properties of Tl2Ca1Ba2Cu2O(x) 2122-plane phase thin films.

Subramanyam, G.↗

NASA NTRS1992

Electrical-transport properties and microwave device performance of sputtered TlCaBaCuO superconducting thin films

The paper describes the processing and electrical transport measurements for achieving reproducible high-Tc and high-Jc sputtered TlCaBaCuO thin films on LaAlO3 substrates, for microelectronic applications. The microwave properties of TlCaBaCuO thin films were investigated by designing, fabricating, and characterizing microstrip ring resonators with a fundamental resonance frequency of 12 GHz on 10-mil-thick LaAlO3 substrates. Typical unloaded quality factors for a ring resonator with a superconducting ground plane of 0.3 micron-thickness and a gold ground plane of 1-micron-thickness were above 1500 at 65 K. Typical values of penetration depth at 0 K in the TlCaBaCuO thin films were between 7000 and 8000 A.

Subramanyam, G.↗

NASA NTRS1992

C-band superconductor/semiconductor hybrid field-effect transistor amplifier on a LaAlO3 substrate

A single-stage C-band superconductor/semiconductor hybrid field-effect transistor amplifier was designed, fabricated, and tested at 77 K. The large area (1 inch x 0.5 inches) high temperature superconducting Tl-Ba-Ca-Cu-O (TBCCO) thin film was rf magnetron sputtered onto a LaAlO3 substrate. The film had a transition temperature of about 92 K after it was patterned and etched. The amplifier showed a gain of 6 dB and a 3 dB bandwidth of 100 MHz centered at 7.9 GHz. An identical gold amplifier circuit was tested at 77 K, and these results are compared with those from the hybrid amplifier.

Nahra, J. J.↗

NASA NTRS1991

Silicon dioxide with a silicon interfacial layer as an insulating gate for highly stable indium phosphide metal-insulator-semiconductor field effect transistors

A novel gate insulator consisting of silicon dioxide (SiO2) with a thin silicon (Si) interfacial layer has been investigated for high-power microwave indium phosphide (InP) metal-insulator-semiconductor field effect transistors (MISFETs). The role of the silicon interfacial layer on the chemical nature of the SiO2/Si/InP interface was studied by high-resolution X-ray photoelectron spectroscopy. The results indicated that the silicon interfacial layer reacted with the native oxide at the InP surface, thus producing silicon dioxide, while reducing the native oxide which has been shown to be responsible for the instabilities in InP MISFETs. While a 1.2-V hysteresis was present in the capacitance-voltage (C-V) curve of the MIS capacitors with silicon dioxide, less than 0.1 V hysteresis was observed in the C-V curve of the capacitors with the silicon interfacial layer incorporated in the insulator. InP MISFETs fabricated with the silicon dioxide in combination with the silicon interfacial layer exhibited excellent stability with drain current drift of less than 3 percent in 10,000 sec, as compared to 15-18 percent drift in 10,000 sec for devices without the silicon interfacial layer. High-power microwave InP MISFETs with Si/SiO2 gate insulators resulted in an output power density of 1.75 W/mm gate width at 9.7 GHz, with an associated power gain of 2.5 dB and 24 percent power added efficiency.

Kapoor, V. J.↗

NASA NTRS1990

Fabrication and chemical composition of RF magnetron sputtered Tl-Ca-Ba-Cu-O high Tc superconducting thin films

The preparation of TlCaBaCuO superconducting thin films on (100) SrTiO3 substrates is described, and the results of their characterization are presented. Sintering and annealing the thin films in a Tl-rich ambient yielded superconductivity with a Tc of 107 K. The results of an XPS study support two possible mechanisms for the creation of holes in the TlCaBaCuO compound: (1) partial substitution of Ca(2+) for Tl(3+), resulting in hole creation, and (2) charge transfer from Tl(3+) to the CuO layers, resulting in a Tl valence between +3 and +1.

Subramanyam, G.↗

NASA NTRS1990

Chemical nature of silicon nitride-indium phosphide interface and rapid thermal annealing for InP MISFETs

A rapid thermal annealing (RTA) process in pure N2 or pure H2 was developed for ion-implanted and encapsulated indium phosphide compound semiconductors, and the chemical nature at the silicon nitride-InP interface before and after RTA was examined using XPS. Results obtained from SIMS on the atomic concentration profiles of the implanted silicon in InP before and after RTA are presented, together with electrical characteristics of the annealed implants. Using the RTA process developed, InP metal-insulator semiconductor FETs (MISFETS) were fabricated. The MISFETS prepared had threshold voltages of +1 V, transconductance of 27 mS/mm, peak channel mobility of 1200 sq cm/V per sec, and drain current drift of only 7 percent.

Biedenbender, M. D.↗

NASA NTRS1989

Submicron nickel-oxide-gold tunnel diode detectors for rectennas

The characteristics of a metal-oxide-metal (MOM) tunnel diode made of nickel, nickel-oxide, and gold, designed and fabricated by standard integrated circuit technology for use in FIR rectennas, are presented. The MOM tunnel diode was formed by overlapping a 0.8-micron-wide layer of 1000-A of nickel, which was oxidized to form a thin layer of nickel oxide, with a 1500 A-thick layer of gold. The dc current-voltage characteristics of the MOM diode showed that the current dependence on voltage was linear about zero bias up to a bias of about 70 mV. The maximum detection of a low-level signal (10-mV ac) was determined to be at a dc voltage of 70 mV across the MOM diode. The rectified output signal due to a chopped 10.6-micron CO2 laser incident upon the rectenna device was found to increase with dc bias, with a maximum value of 1000 nV for a junction bias of 100 mV at room temperature.

Hoofring, A. B.↗

NASA NTRS1989

Plasma deposited silicon nitride for indium phosphide encapsulation

The composition and the annealing characteristics of plasma-deposited silicon-nitride encapsulating films on the ion-implanted InP substrates were investigated, using two different substrate-cleaning procedures (organic solvents and HF or HIO3 solutions) prior to encapsulation. The effect of plasma deposition of silicon nitride on the InP substrates was assessed through the current-voltage characteristics of Schottky diodes. Results of XPS analyses showed that the cleaning procedure that employed HF solution left less oxygen on the InP surface than the procedure involving HIO3. No chemical interaction between the film and the substrate was observed before or after annealing.

Valco, G. J.↗

NASA NTRS1986

Diamondlike carbon films on semiconductors for insulated-gate technology

MIS structures are fabricated on p-type InP, GaAs, and Si substrated by direct ionization of 25-percent CH4 in Ar and ion-beam deposition of 70-nm-thick diamondlike films, followed by application of Al gate electrodes and ohmic contacts. The films are found to have bandgap 0.9-1.1 eV, resistivity 8.1 Mohm cm, breakdown field strength 1 MV/cm, and density 1.8 g/cu cm, to be thermally stable up to 400 C, and to undergo rapid decomposition above 450 C. The electrical properties of the MIS structures are significantly improved by sputter cleaning the substrates with a 1-keV 2-mA/sq cm Ar beam for 2 min at 300 microtorr prior to C-film deposition. The resulting structures have fixed insulator charge number densities 4 x 10 to the 12th/sq cm (InP), 7.5 x 10 to the 12th/sq cm (GaAs), and 9 x 10 to the 11th/sq cm (Si) and interface state densities (5, 200, and 0.5) x 10 to the 12th/ sq cm eV, respectively. It is suggested that the low optical bandgap and resistivity of the C films and the high insulator-charge and interface-state densities make them unstable as gate dielectrics for microelectronics.

Kapoor, V. J.↗

NASA NTRS1985

Role of GaAs surface clearing in plasma deposition of silicon nitride films for encapsulated annealing

The role of GaAs surface cleaning and plasma reactor cleaning prior to deposition of silicon nitride films for encapsulated annealing has been investigated. X-ray photoelectron spectroscopy was employed to determine the surface characteristics of GaAs treated with HCl, HF, and NH4OH solutions preceded by a degreasing procedure. The HCl clean left the least amount of oxygen on the surface. Fluorine contamination resulting from the CF4 plasma used to clean the reactor was found to be located at the film-substrate interface by Auger electron spectroscopy with argon-ion sputtering. A modified deposition procedure was developed to eliminate the fluorine contamination. Plasma deposition of silicon nitride encapsulating films was found to modify the I-V characteristics of Schottky diodes subsequently formed on GaAs surface. The reverse current of the diodes was slightly reduced. Substrates implanted with Si at 100 keV and a dose of 5 x 10 to the 12th/sq cm showed a peak electron concentration of 1.7 x 10 to the 17th/cu cm at a depth of 0.1-micron with 60 percent activation after encapsulation and annealing at 800 C for 7 min.

Valco, G. J.↗

NASA NTRS1985

High-voltage solar-cell chip

Integrated circuit technology has been successfully applied to the design and fabrication of 0.5 x 0.5-cm planar multijunction solar-cell chips. Each of these solar cells consisted of six voltage-generating unit cells monolithically connected in series and fabricated on a 75-micron-thick, p-type, single crystal, silicon substrate. A contact photolithic process employing five photomask levels together with a standard microelectronics batch-processing technique were used to construct the solar-cell chip. The open-circuit voltage increased rapidly with increasing illumination up to 5 AM1 suns where it began to saturate at the sum of the individual unit-cell voltages at a maximum of 3.0 V. A short-circuit current density per unit cell of 240 mA/sq cm was observed at 10 AM1 suns.

Kapoor, V. J.↗

NASA NTRS1982

Planar multijunction high voltage solar cell chip

A new innovative planar multijunction solar cell chip for concentrated sunlight applications is proposed. The chip consists of many voltage-generating regions, called unit cells, which are connected in series within a single silicon wafer, thereby providing a high open-circuit voltage at multiple sun illumination levels. The unit cells are fabricated on 75 micron thick p-type single crystal silicon substrate. Each chip consists of 1.42 x 9.63 mm n(+)/p collecting junctions on the back of the wafer, while the illuminated front surface area is divided into 0.3 micron deep n(+) regions. The fabrication sequence includes standard degreasing and cleaning procedures, double-sided alignment photomasking, introduction of boron and phosphorus impurities, and photolithography. The open circuit voltage of the chip increased rapidly with illumination up to about 4 AM1 suns, and then began to saturate at the sum of the individual unit cell voltages of 3.5 above 4 AM1 suns. A short circuit density per unit cell of 300 mA/sq cm at 20 AM1 suns was observed.

Valco, G. J.↗

NASA NTRS1981

Multijunction high voltage concentrator solar cells

The standard integrated circuit technology has been developed to design and fabricate new innovative planar multi-junction solar cell chips for concentrated sunlight applications. This 1 cm x 1 cm cell consisted of several voltage generating regions called unit cells which were internally connected in series within a single chip resulting in high open circuit voltages. Typical open-circuit voltages of 3.6 V and short-circuit currents of 90 ma were obtained at 80 AM1 suns. A dramatic increase in both short circuit current and open circuit voltage with increased light levels was observed.

Valco, G. J.↗

NASA NTRS1981

Fabrication of multijunction high voltage concentrator solar cells by integrated circuit technology

Standard integrated circuit technology has been developed for the design and fabrication of planar multijunction (PMJ) solar cell chips. Each 1 cm x 1 cm solar chip consisted of six n(+)/p, back contacted, internally series interconnected unit cells. These high open circuit voltage solar cells were fabricated on 2 ohm-cm, p-type 75 microns thick, silicon substrates. A five photomask level process employing contact photolithography was used to pattern for boron diffusions, phorphorus diffusions, and contact metallization. Fabricated devices demonstrated an open circuit voltage of 3.6 volts and a short circuit current of 90 mA at 80 AMl suns. An equivalent circuit model of the planar multi-junction solar cell was developed.

Valco, G. J.↗