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Kolawa, Elizabeth

Publications and source records attributed to Kolawa, Elizabeth.

A Motor Drive Electronics Assembly for Mars Curiosity Rover: An Example of Assembly Qualification for Extreme Environments

This paper describes the technology development and infusion of a motor drive electronics assembly for Mars Curiosity Rover under space extreme environments. The technology evaluation and qualification as well as space qualification of the assembly are detailed and summarized. Because of the uncertainty of the technologies operating under the extreme space environments and that a high level reliability was required for this assembly application, both component and assembly board level qualifications were performed.

Kolawa, Elizabeth

SiGe Based Low Temperature Electronics for Lunar Surface Applications

The temperature at the permanently shadowed regions of the moon's surface is approximately -240 C. Other areas of the lunar surface experience temperatures that vary between 120 C and -180 C during the day and night respectively. To protect against the large temperature variations of the moon surface, traditional electronics used in lunar robotics systems are placed inside a thermally controlled housing which is bulky, consumes power and adds complexity to the integration and test. SiGe Based electronics have the capability to operate over wide temperature range like that of the lunar surface. Deploying low temperature SiGe electronics in a lander platform can minimize the need for the central thermal protection system and enable the development of a new generation of landers and mobility platforms with highly efficient distributed architecture. For the past five years a team consisting of NASA, university and industry researchers has been examining the low temperature and wide temperature characteristic of SiGe based transistors for developing electronics for wide temperature needs of NASA environments such as the Moon, Titan, Mars and Europa. This presentation reports on the status of the development of wide temperature SiGe based electronics for the landers and lunar surface mobility systems.

electonics

Advanced Embedded Active Assemblies for Extreme Space Applications

This work describes the development and evaluation of advanced technologies for the integration of electronic die within membrane polymers. Specifically, investigators thinned silicon die, electrically connecting them with circuits on flexible liquid crystal polymer (LCP), using gold thermo-compression flip chip bonding, and embedding them within the material. Daisy chain LCP assemblies were thermal cycled from -135 to +85degC (Mars surface conditions for motor control electronics). The LCP assembly method was further utilized to embed an operational amplifier designed for operation within the Mars surface ambient. The embedded op-amp assembly was evaluated with respect to the influence of temperature on the operational characteristics of the device. Applications for this technology range from multifunctional, large area, flexible membrane structures to small-scale, flexible circuits that can be fit into tight spaces for flex to fit applications.

lead bonding

Using G4FETs as a Data Router for In-Plane Crossing of Signal Paths

Theoretical analysis and some experiments have demonstrated that siliconon- insulator (SOI) 4-gate transistors the type known as G(exp 4)FETs could be efficiently used for in-plane crossing of signal paths. Much of the effort of designing very-large-scale integrated (VLSI) circuits is focused on area-efficient routing of signals. The main source of difficulty in VLSI signal routing is the requirement to prevent crossing, in the same plane, of wires that are meant to be kept electrically insulated from each other. Consequently, it often becomes necessary to design and build VLSI circuits in multiple layers with vias (connections between conductors in different layers at selected locations). Suitable devices that would prevent, or at least sufficiently suppress, undesired electrical coupling (cross-talk) between wires crossing in the same plane would enable compact, simpler implementation complex interconnection networks with in-plane crossings that, heretofore, have not been possible in VLSI circuitry. The use of G4FETs as in-plane signal-crossing devices or routers, in combination with the use of G(exp 4)FETs as universal programmable logic gates, would create opportunities for reducing complexity in VLSI design.

Fijany, Amir

G4-FETs as Universal and Programmable Logic Gates

An analysis of a patented generic silicon- on-insulator (SOI) electronic device called a G4-FET has revealed that the device could be designed to function as a universal and programmable logic gate. The universality and programmability could be exploited to design logic circuits containing fewer discrete components than are required for conventional transistor-based circuits performing the same logic functions. A G4-FET is a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G4-FET can also be regarded as a single transistor having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of the SOI substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. With proper choice of the specific dimensions for the gates, channels, and ancillary features of the generic G4-FET, the device could be made to function as a three-input, one-output logic gate. As illustrated by the truth table in the top part of the figure, the behavior of this logic gate would be the inverse (the NOT) of that of a majority gate. In other words, the device would function as a NOT-majority gate. By simply adding an inverter, one could obtain a majority gate. In contrast, to construct a majority gate in conventional complementary metal oxide/semiconductor (CMOS) circuitry, one would need four three-input AND gates and a four-input OR gate, altogether containing 32 transistors.

Johnson, Travis

Wide-Temperature-Range Integrated Operational Amplifier

A document discusses a silicon-on-insulator (SOI) complementary metal oxide/semiconductor (CMOS) integrated- circuit operational amplifier to be replicated and incorporated into sensor and actuator systems of Mars-explorer robots. This amplifier is designed to function at a supply potential less than or equal to 5.5 V, at any temperature from -180 to +120 C. The design is implemented on a commercial radiation-hard SOI CMOS process rated for a supply potential of less than or equal to 3.6 V and temperatures from -55 to +110 C. The design incorporates several innovations to achieve this, the main ones being the following: NMOS transistor channel lengths below 1 m are generally not used because research showed that this change could reduce the adverse effect of hot carrier injection on the lifetimes of transistors at low temperatures. To enable the amplifier to withstand the 5.5-V supply potential, a circuit topology including cascade devices, clamping devices, and dynamic voltage biasing was adopted so that no individual transistor would be exposed to more than 3.6 V. To minimize undesired variations in performance over the temperature range, the transistors in the amplifier are biased by circuitry that maintains a constant inversion coefficient over the temperature range.

Mojarradi, Mohammad

Alpha-Voltaic Sources Using Diamond as Conversion Medium

A family of proposed miniature sources of power would exploit the direct conversion of the kinetic energy of a particles into electricity in diamond semiconductor diodes. These power sources would function over a wide range of temperatures encountered in terrestrial and outer-space environments. These sources are expected to have operational lifetimes of 10 to 20 years and energy conversion efficiencies >35 percent. A power source according to the proposal would include a pair of devices like that shown in the figure. Each device would contain Schottky and p/n diode devices made from high-band-gap, radiation-hard diamond substrates. The n and p layers in the diode portion would be doped sparsely (<1014 cm-3) in order to maximize the volume of the depletion region and thereby maximize efficiency. The diode layers would be supported by an undoped diamond substrate. The source of a particles would be a thin film of 244Cm (half-life 18 years) sandwiched between the two paired devices. The sandwich arrangement would force almost every a particle to go through the active volume of at least one of the devices. Typical a particle track lengths in the devices would range from 20 to 30 microns. The a particles would be made to stop only in the undoped substrates to prevent damage to the crystalline structures of the diode portions. The overall dimensions of a typical source are expected to be about 2 by 2 by 1 mm. Assuming an initial 244Cm mass of 20 mg, the estimated initial output of the source is 20 mW (a current of 20 mA at a potential of 1 V).

Patel, Jagadish U.

Design for ASIC reliability for low-temperature applications

In this paper, we present a methodology to design for reliability for low temperature applications without requiring process improvement. The developed hot carrier aging lifetime projection model takes into account both the transistor substrate current profile and temperature profile to determine the minimum transistor size needed in order to meet reliability requirements. The methodology is applicable for automotive, military, and space applications, where there can be varying temperature ranges. A case study utilizing this methodology is given to design for reliability into a custom application-specific integrated circuit (ASIC) for a Mars exploration mission.

reliability

Technology for Entry Probes

A viewgraph describing technologies for entry probes is presented. The topics include: 1) Entry Phase; 2) Descent Phase; 3) Long duration atmospheric observations; 4) Survivability at high temperatures; and 5) Summary.

Cutts, James A.

Operation of FPGAs at Extremely Low Temperatures

This paper describes the operation of FPGAs at very low temperatures eg -160(deg)C. Both Actel and Xilinx parts are tested It was found that low temperature operations is not a problem with the parts tested, but there is a problem with powering on an FPGA at cold temperatures.

Field-Programmable Gate Array (FPGA)

Coherent gradient sensing method and system for measuring surface curvature

A system and method for determining a curvature of a specularly reflective surface based on optical interference. Two optical gratings are used to produce a spatial displacement in an interference field of two different diffraction components produced by one grating from different diffraction components produced by another grating. Thus, the curvature of the surface can be determined.

Rosakis, Ares J.