Engineering topics

Kwatra, S. C.

Publications and source records attributed to Kwatra, S. C..

At least 19 records

NASA NTRS1999

Investigation of Near Shannon Limit Coding Schemes

Turbo codes can deliver performance that is very close to the Shannon limit. This report investigates algorithms for convolutional turbo codes and block turbo codes. Both coding schemes can achieve performance near Shannon limit. The performance of the schemes is obtained using computer simulations. There are three sections in this report. First section is the introduction. The fundamental knowledge about coding, block coding and convolutional coding is discussed. In the second section, the basic concepts of convolutional turbo codes are introduced and the performance of turbo codes, especially high rate turbo codes, is provided from the simulation results. After introducing all the parameters that help turbo codes achieve such a good performance, it is concluded that output weight distribution should be the main consideration in designing turbo codes. Based on the output weight distribution, the performance bounds for turbo codes are given. Then, the relationships between the output weight distribution and the factors like generator polynomial, interleaver and puncturing pattern are examined. The criterion for the best selection of system components is provided. The puncturing pattern algorithm is discussed in detail. Different puncturing patterns are compared for each high rate. For most of the high rate codes, the puncturing pattern does not show any significant effect on the code performance if pseudo - random interleaver is used in the system. For some special rate codes with poor performance, an alternative puncturing algorithm is designed which restores their performance close to the Shannon limit. Finally, in section three, for iterative decoding of block codes, the method of building trellis for block codes, the structure of the iterative decoding system and the calculation of extrinsic values are discussed.

Kwatra, S. C.↗

NASA NTRS1998

Investigation of Different Constituent Encoders in a Turbo-code Scheme for Reduced Decoder Complexity

A large number of papers have been published attempting to give some analytical basis for the performance of Turbo-codes. It has been shown that performance improves with increased interleaver length. Also procedures have been given to pick the best constituent recursive systematic convolutional codes (RSCC's). However testing by computer simulation is still required to verify these results. This thesis begins by describing the encoding and decoding schemes used. Next simulation results on several memory 4 RSCC's are shown. It is found that the best BER performance at low E(sub b)/N(sub o) is not given by the RSCC's that were found using the analytic techniques given so far. Next the results are given from simulations using a smaller memory RSCC for one of the constituent encoders. Significant reduction in decoding complexity is obtained with minimal loss in performance. Simulation results are then given for a rate 1/3 Turbo-code with the result that this code performed as well as a rate 1/2 Turbo-code as measured by the distance from their respective Shannon limits. Finally the results of simulations where an inaccurate noise variance measurement was used are given. From this it was observed that Turbo-decoding is fairly stable with regard to noise variance measurement.

Kwatra, S. C.↗

NASA NTRS1997

Investigation of the Use of Erasures in a Concatenated Coding Scheme

A new method for declaring erasures in a concatenated coding scheme is investigated. This method is used with the rate 1/2 K = 7 convolutional code and the (255, 223) Reed Solomon code. Errors and erasures Reed Solomon decoding is used. The erasure method proposed uses a soft output Viterbi algorithm and information provided by decoded Reed Solomon codewords in a deinterleaving frame. The results show that a gain of 0.3 dB is possible using a minimum amount of decoding trials.

Kwatra, S. C.↗

NASA NTRS1995

A Single Chip VLSI Implementation of a QPSK/SQPSK Demodulator for a VSAT Receiver Station

This thesis presents a VLSI implementation of a QPSK/SQPSK demodulator. It is designed to be employed in a VSAT earth station that utilizes the FDMA/TDM link. A single chip architecture is used to enable this chip to be easily employed in the VSAT system. This demodulator contains lowpass filters, integrate and dump units, unique word detectors, a timing recovery unit, a phase recovery unit and a down conversion unit. The design stages start with a functional representation of the system by using the C programming language. Then it progresses into a register based representation using the VHDL language. The layout components are designed based on these VHDL models and simulated. Component generators are developed for the adder, multiplier, read-only memory and serial access memory in order to shorten the design time. These sub-components are then block routed to form the main components of the system. The main components are block routed to form the final demodulator.

Kwatra, S. C.↗

NASA NTRS1993

Compressing subbanded image data with Lempel-Ziv-based coders

A method of improving the compression of image data using Lempel-Ziv-based coding is presented. Image data is first processed with a simple transform, such as the Walsh Hadamard Transform, to produce subbands. The subbanded data can be rounded to eight bits or it can be quantized for higher compression at the cost of some reduction in the quality of the reconstructed image. The data is then run-length coded to take advantage of the large runs of zeros produced by quantization. Compression results are presented and contrasted with a subband compression method using quantization followed by run-length coding and Huffman coding. The Lempel-Ziv-based coding in conjunction with run-length coding produces the best compression results at the same reconstruction quality (compared with the Huffman-based coding) on the image data used.

Glover, Daniel↗

NASA NTRS1993

Subband coding for image data archiving

The use of subband coding on image data is discussed. An overview of subband coding is given. Advantages of subbanding for browsing and progressive resolution are presented. Implementations for lossless and lossy coding are discussed. Algorithm considerations and simple implementations of subband systems are given.

Glover, Daniel↗

NASA NTRS1993

Automated synthesis and verification of configurable DRAM blocks for ASIC's

A highly flexible embedded DRAM compiler is developed which can generate DRAM blocks in the range of 256 bits to 256 Kbits. The compiler is capable of automatically verifying the functionality of the generated DRAM modules. The fully automated verification capability is a key feature that ensures the reliability of the generated blocks. The compiler's architecture, algorithms, verification techniques and the implementation methodology are presented.

Pakkurti, M.↗

NASA NTRS1992

Efficient demultiplexing algorithm for noncontiguous carriers

A channel separation algorithm for the frequency division multiple access/time division multiplexing (FDMA/TDM) scheme is presented. It is shown that implementation using this algorithm can be more effective than the fast Fourier transform (FFT) algorithm when only a small number of carriers need to be selected from many, such as satellite Earth terminals. The algorithm is based on polyphase filtering followed by application of a generalized Walsh-Hadamard transform (GWHT). Comparison of the transform technique used in this algorithm with discrete Fourier transform (DFT) and FFT is given. Estimates of the computational rates and power requirements to implement this system are also given.

Thanawala, A. A.↗

NASA NTRS1992

Rotative quadrature phase-shift keying

A rotative quadrature phase-shift keying (RQPSK) modulation scheme is proposed. By rotating the QPSK signal constellation by pi/2, either clockwise or anticlockwise, during a symbol duration, the conventional QPSK scheme can be modified to transmit 3 bits per symbol to achieve both power and bandwidth efficiency.

Liu, J.↗

NASA NTRS1992

High speed hardware development for FDMA/TDM system

The development of a transmultiplexor and a quadrature phase shift keying (QPSK) demodulator is discussed. The system is designed to meet real time signal processing requirements of future satellite systems and should consume very little power. The architectures of the transmultiplexor and the demodulator are designed for the pipelining of all the modules, namely the commutator, the filter bank fast fourier transform (FFT), and the internal modules of the QPSK. The architecture is designed for the case of 800 channels. Each channel is to have a bandwidth of 45 KHz and a bit rate of 64 Kb/s. In this case each module will have 22.22 micro seconds to complete a computation.

Kwatra, S. C.↗

NASA NTRS1992

Subband coding for image data archiving

Glover, D.↗

NASA NTRS1992

Bandwidth compression of the digitized HDTV images for transmission via satellites

This paper investigates a subband coding scheme to reduce the transmission bandwidth of the digitized HDTV images. The HDTV signals are decomposed into seven bands. Each band is then independently encoded. The based band is DPCM encoded and the high bands are encoded by using nonuniform Laplacian quantizers with a dead zone. By selecting the dead zone on the basis of energy in the high bands an acceptable image quality is achieved at an average of 45 Mbits/sec (Mbps) rate. This rate is comparable to some very hardware intensive schemes of transform compression or vector quantization proposed in the literature. The subband coding scheme used in this study is considered to be of medium complexity. The 45 Mbps rate is suitable for transmission of HDTV signals via satellites.

Al-Asmari, A. KH.↗

NASA NTRS1991

A reconfigurable multicarrier demodulator architecture

An architecture based on parallel and pipline design approaches has been developed for the Frequency Division Multiple Access/Time Domain Multiplexed (FDMA/TDM) conversion system. The architecture has two main modules namely the transmultiplexer and the demodulator. The transmultiplexer has two pipelined modules. These are the shared multiplexed polyphase filter and the Fast Fourier Transform (FFT). The demodulator consists of carrier, clock, and data recovery modules which are interactive. Progress on the design of the MultiCarrier Demodulator (MCD) using commercially available chips and Application Specific Integrated Circuits (ASIC) and simulation studies using Viewlogic software will be presented at the conference.

Kwatra, S. C.↗

NASA NTRS1991

Multicarrier demodulator architecture for onboard processing satellites

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Eugene, L. P.↗

NASA NTRS1991

A parallel-pipelined architecture for a multi carrier demodulator

Analog devices have been used for processing the information on board the satellites. Presently, digital devices are being used because they are economical and flexible as compared to their analog counterparts. Several schemes of digital transmission can be used depending on the data rate requirement of the user. An economical scheme of transmission for small earth stations uses single channel per carrier/frequency division multiple access (SCPC/FDMA) on the uplink and time division multiplexing (TDM) on the downlink. This is a typical communication service offered to low data rate users in commercial mass market. These channels usually pertain to either voice or data transmission. An efficient digital demodulator architecture is provided for a large number of law data rate users. A demodulator primarily consists of carrier, clock, and data recovery modules. This design uses principles of parallel processing, pipelining, and time sharing schemes to process large numbers of voice or data channels. It maintains the optimum throughput which is derived from the designed architecture and from the use of high speed components. The design is optimized for reduced power and area requirements. This is essential for satellite applications. The design is also flexible in processing a group of a varying number of channels. The algorithms that are used are verified by the use of a computer aided software engineering (CASE) tool called the Block Oriented System Simulator. The data flow, control circuitry, and interface of the hardware design is simulated in C language. Also, a multiprocessor approach is provided to map, model, and simulate the demodulation algorithms mainly from a speed view point. A hypercude based architecture implementation is provided for such a scheme of operation. The hypercube structure and the demodulation models on hypercubes are simulated in Ada.

Kwatra, S. C.↗

NASA NTRS1991

Comparative study on the performance of power and bandwidth efficient modulations in LMSS under fading and interference

Aspects of error performance of various power and bandwidth efficient modulations for the land mobile satellite systems (LMSS) were investigated under multipath fading and interferences by using Monte-Carlo simulation. A differential detection for 16QAM (quadrature amplitude modulation) was proposed to cope with Ricean fading and Doppler shift. Computer simulation results show that the performance of 16QAM with differential detection is as good as that of 16PSK with coherent detection and 3 dB better than that of 16PSK with differential detection, although it degrades by about 4.5 dB as compared to 16QAM with coherent detection under an additive white Gaussian noise (AWGN) channel. For the nonlinear channels, 16QAM with modified signal constellations is introduced and analyzed. The simulation results show that the modified 16QAM exhibits a gain of 2.5 dB over 16PSK under traveling-wave tube nonlinearity, and about 4 dB gain over 16PSK at the bit error rate of 10 exp -5 under AWGN. Computer simulation results for modified 16 QAM under cochannel interference and adjacent-channel interference are also presented.

Liu, Jian↗

NASA NTRS1990

Encoding Y,I,Q component estimates of an NTSC composite signal

Several new techniques for reducing the entropy of a Y,I,Q component digital transmission are presented. A discussion of each technique is presented along with objective and subjective analysis. For a set of four test pictures, the average Y,I,Q entropy/pixel was reduced by nearly 80 percent. An initial component system entropy of 11.08 bits/pixel was reduced to 2.33 bits/pixel. Although exact numeric results are dependent on the separation technique used, the methods presented may be applied to systems using other component separation methods.

Border, David A.↗

NASA NTRS1990

A parallel pipelined architecture for a digital multicarrier demodulator

A parallel pipelined architecture is presented for demultiplexing and demodulating SCPC/FDMA channels in real time. Specific algorithms are selected for each of the operations necessary for multicarrier demodulation. The selection is made based on their suitability for implementation into parallel-pipelined and sharing schemes. The demodulator is programmable and uses a single hardware module which is shared among all the channels for the recovery of clock, carrier, and data, resulting in large savings of power and hardware. The system is suitable for onboard processing of signals in satellites where power and area requirements are critical. The design is illustrated for the specific case of processing 800 FDMA channels at 64 kb/s each.

Fernandes, P. J.↗