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Engineering topics

Lima Salles, Caroline (ORCID:0000000315373611)

Publications and source records attributed to Lima Salles, Caroline (ORCID:0000000315373611).

High-Performance Passivating Contacts for Si PV Based on Engineered, Doped Nanopinholes through Dielectric Layers

We present a novel, industrially relevant method to fabricate high-performance poly-Si passivating contacts for Si PV. Passivating contacts based on SiOx/poly-Si layer stacks have been implemented in record-efficiency homojunction Si solar cells. In this technology, the carrier transport through a surface-passivating SiOx is enabled either by quantum-tunneling or nanopinholes. The doped poly-Si layer provides charge-carrier selectivity. Previously, the ISFH research group demonstrated a record 26.1% efficient Si homojunction cell, where transport pinholes in ~2 nm SiOx were produced by thermal breakdown at > 1000 degrees C, which is hard to control and is surface morphology-dependent. At room temperature, our new process uses electroless plating of Ag nanoparticles, followed by metal-assisted chemical etching. Nanogalvanic corrosion yields < 20 nm-wide nanopinholes in an insulating > 2 nm SiOx layer. The nanopinholes are filled by a heavily doped a-Si:H overlayer. We drive in the dopants into the Si wafer with subsequent high-temperature annealing. Preferential incorporation of dopants at pinhole locations results in nanoscale p+/n or n+/n junctions near the wafer interface. Each heavily-doped nanoscale pinhole junction collects and transports photogenerated carriers to the cell metal contacts. The density of the engineered nanopinholes can be tuned over a wide range which is critical for optimization of device performance. The same nanogalvanic corrosion principles can be applied to produce doped transport pinholes in well-passivating thick dielectric SiOx/SiNy stacks. Importantly, our process does not rely on thermal breakdown of the dielectric layers and can be applied to textured wafers resulting in Si solar cells with > 20% conversion efficiency.

dielectric layer↗

Structure and Electronic Properties of Mesopores in Si PV Devices with PLEO Contacts

All current state-of-the-art silicon photovoltaic (PV) devices employ some flavor of passivating contact structure to minimize detrimental recombination while providing good conductivity. These properties are most often provided by a dielectric layer (SiNx, Al2O3, or SiOx) that is in contact with the crystalline silicon (c-Si) substrate. The effectiveness of these layers is heavily dependent on the nanoscale structure of both the dielectric layers and the crystalline silicon interface. As an example, the tunneling probability for charge carriers across thin SiOx layers, a process that is critical to maintain high conductivity, is extremely sensitive to the SiOx thickness. SiOx with a thickness below 2 nm readily allows charge carrier tunneling, whereas it is impeded for greater thicknesses. In the latter case it has been shown that modifications to the thermal processing schedule can induce disruptions, or pinholes, in thick SiOx layers that allow transport of charge carriers while maintaining excellent passivation. However, this requires higher temperatures processes that may inhibit widespread adoption by industry. Recently, another option has been presented that may circumvent the necessity for high temperature processing, namely metal assisted chemical etching (MACE). MACE relies on deposition of Ag nanoparticles onto the SiOx layers with subsequent electroless etching to form mesopores in the SiOx layers that are analogous to the pinholes created with high temperature processing. The size and density can be controlled based on the Ag nanoparticle deposition conditions. The resulting contact structure is known as polysilicon on locally etched oxide (PLEO) contacts. The nanoscale structure of the mesopores in PLEO contacts define the device level observables such as recombination current (Jo) and junction resistance. In this work we present atomic resolution transmission electron microscopy (TEM) analysis of mesopores in PLEO contacts formed with a different processing conditions to connect provide insight into how the nanoscale structure of the SiOx layer influences PV device properties. Additionally, we have previously used electron beam induced current (EBIC) to probe local transport properties in Si PV devices with a SiOx layer containing pinholes due to high temperature processing. Using EBIC we were able to directly show the enhance charge carrier transport through the pinholes. Here we also employ EBIC to study non-uniformities in charge carrier recombination and transport associated with mesopores in PLEO contacts and compare these results with our previous work on devices with pinholes in the SiOx formed through high temperature processes. The products of this work provide critical information that is required to both further optimize performance of Si PV devices with PLEO contact and to drive future adoption of this technology by industry.

ENGINEERING,SOLAR ENERGY↗

Characterization of Engineered Pinholes in Dielectric Stacks of High-Performance Poly-Silicon Passivating Contacts

Passivating contact structures are expected to be implemented in > 50 % of industrially manufactured silicon photovoltaics produced over the next decade. One type of passivating contact utilizes a c-Si/dielectric/doped poly-Si layer stack. In cases where the dielectric layer/s are thick enough to impede tunneling of charge carriers, it was shown that disruptions (pinholes) in the dielectric are required to facilitate transport.[1] Pinholes in SiOx layers have typically been formed via high temperature annealing that allows localized breakup of this layer. This approach has drawbacks; 1) high temperature annealing increases cost and 2) pinhole formation is sensitive to both the SiOx thickness and wafer surface morphology making control of density and dimensions difficult. Recently, an alternative method of pinhole formation relying on metal assisted chemical etching (MACE) was shown to allow control over pinhole areal densities.[2] Such control is critical as both the density and dimensions of the pinholes determine saturation current density and contact resistivity. The contacts formed with the MACE process are known as polysilicon on locally etched oxide or PLEO and also result in low saturation current densities and low contact resistivity due to SiOx passivation and engineered pinhole enabled charge carrier transport, respectively. Photovoltaic devices with efficiencies greater than 20 % have recently been produced with these contacts, demonstrating the viability of contacts with engineered pinholes. Experimentally, preferential local collection of excess charge carriers has been observed and definitively connected to thermally induced pinholes in thick SiOx layers within c-Si/SiOx/poly-Si contact structures.[3] Recent work has shown that enhanced local collection of excess carriers can result from enhanced diffusion of dopants through pinholes in SiOx layers.[4] This study was restricted to simulation and characterization of poly-Si with the same dopant type as the c-Si substrates. In this work we focus our analysis on boron doped poly-Si with different stacks of dielectric layers (PLEO and PLENO where the N refers to a SiNy layer on top of the SiOx) on n-type crystalline silicon. This provides insight into how engineered pinholes affect charge collection across the p-n junction. Like previous observations of locally enhanced carrier transport through thermally induced pinholes, the EBIC images in Figure 1 shows that engineered pinholes in PLENO (1a) and PLEO (1b) also exhibit locally enhanced carrier transport at pinhole locations (bright spots in the images). We will also present detailed correlative nanoscale structural and chemical analysis using TEM imaging and EELS analysis with sample preparation guided by EBIC imaging. This allows us to connect the density and dimensions of engineered pinholes with charge carrier transport and measured photovoltaic device parameters. Our findings will accelerate the adoption of PLEO and PLENO contacts in industrially manufactured photovoltaic devices.

EBIC↗

Controlling Pinhole Radius and Areal Density in a-Si/SiOx Using Metal-Assisted Chemical Etching

Polysilicon on silicon oxide (poly-Si/SiOx) passivating contacts with predominant charge-carrier transport via pinholes are currently prepared via a>1000 degrees C thermal step to induce oxide break-up. Herein, we develop the precursor of a pinhole-enabled poly-Si/SiOx contact utilizing room temperature metal-assisted chemical etching (MACE) to form pinholes in the SiOx. The pinholes were created via electroless Ag nanoparticle (Ag NP) deposition followed by the MACE of intrinsic amorphous hydrogenated silicon (a-Si:H) on SiOx, creating isolated mesopores through the film stack. By varying the MACE etching solution (HF:H2O2) concentration, we were able to vary the pinhole areal density over four orders of magnitude (104-107 cm-2). We observed the Ostwald ripening of the Ag NP to enable control over the pinhole radii. Our work demonstrates proof-of-concept for a-Si:H/SiOx with mesopores across the film stack, which may serve as precursor for the development of poly-Si/SiOx passivating contacts of both polarities.

MATERIALS SCIENCE,SOLAR ENERGY↗

Controlled Dielectric Breakdown to Form Pinhole Passivated Contacts

This contribution explores a low-temperature route to forming dielectric pinholes to form poly-Si/dielectric/c-Si passivated contacts. The method utilizes controlled dielectric breakdown to form nanoscale pinholes in a thick (non-tunnelling) dielectric which, when annealed, allows dopant atoms to pass from doped poly-Si through the dielectric and into the c-Si wafer forming conductive pathways. We show that the pinholes can be repassivated with dopants and H diffusion which results in increased PL signals after processing. The method can be expanded to optimized dielectric passivation stacks (not just a single layer) and can be formed in parallel over the faces of the wafer in selected areas (only under the grid).

controlled dielectric breakdown↗

Fabrication of Poly-Si on Locally Etched SiOx as Passivating Contacts for c-Si Solar Cells

Proof-of-concept for polysilicon on locally etched oxide (PLEO) contacts. Room temperature approach (via MACE) to engineer pinholes decouples charge-carrier transport across contact from passivation scheme of choice. 19 and 17% PLEO devices fabricated on double-side textured and saw-damage etched n Cz wafers, respectively. Preliminary work on polysilicon on locally etched nitride/oxide (PLENO) contacts. 0.2 fA/cm2 achieved with p PLENO; contact displays Ohmic behavior but still very resistive due to low pinhole density.

c-Si↗

Fabrication of Poly-Si on Locally Etched SiOx as Passivating Contacts for c-Si Solar Cells

Polysilicon on silicon oxide (poly-Si/SiO x ) passivating contacts with predominant charge-carrier transport via pinholes were prepared with room temperature metal-assisted chemical etching. Pinhole areal densities in the range of 2.8 x 10^4 to 4.5 x 10^7 cm^-2 were imaged by SEM. Contact resistivity of 32 m-ohm-cm^2 and implied open circuit voltage of 729 mV were obtained for symmetric n+ poly-Si/SiOx grown onto randomly textured n-Cz. We also show preliminary data pertaining boron-doped polysilicon on nitride/oxide passivating contacts, with which we achieved implied open circuit voltage above 730 mV and recombination current of 0.2 fA/cm^2.

amorphous Si↗