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Liu, Yuan-Kwei

Publications and source records attributed to Liu, Yuan-Kwei.

Modeling, Simulation and Analysis of Public Key Infrastructure

Security is an essential part of network communication. The advances in cryptography have provided solutions to many of the network security requirements. Public Key Infrastructure (PKI) is the foundation of the cryptography applications. The main objective of this research is to design a model to simulate a reliable, scalable, manageable, and high-performance public key infrastructure. We build a model to simulate the NASA public key infrastructure by using SimProcess and MatLab Software. The simulation is from top level all the way down to the computation needed for encryption, decryption, digital signature, and secure web server. The application of secure web server could be utilized in wireless communications. The results of the simulation are analyzed and confirmed by using queueing theory.

Liu, Yuan-Kwei

Performance analysis and kernel size study of the Lynx real-time operating system

This paper analyzes the Lynx real-time operating system (LynxOS), which has been selected as the operating system for the Space Station Freedom Data Management System (DMS). The features of LynxOS are compared to other Unix-based operating system (OS). The tools for measuring the performance of LynxOS, which include a high-speed digital timer/counter board, a device driver program, and an application program, are analyzed. The timings for interrupt response, process creation and deletion, threads, semaphores, shared memory, and signals are measured. The memory size of the DMS Embedded Data Processor (EDP) is limited. Besides, virtual memory is not suitable for real-time applications because page swap timing may not be deterministic. Therefore, the DMS software, including LynxOS, has to fit in the main memory of an EDP. To reduce the LynxOS kernel size, the following steps are taken: analyzing the factors that influence the kernel size; identifying the modules of LynxOS that may not be needed in an EDP; adjusting the system parameters of LynxOS; reconfiguring the device drivers used in the LynxOS; and analyzing the symbol table. The reductions in kernel disk size, kernel memory size and total kernel size reduction from each step mentioned above are listed and analyzed.

Liu, Yuan-Kwei

Technique and applications of device driver dynamic loading

This paper discusses the techniques and feasibility of dynamically loading device drivers for the real-time operating system of the Space Station Freedom Data Management System. The rationale and advantages of device driver dynamic loading are discussed and the procedures are analyzed. A prototype program is implemented to demonstrate the feasibility and to simplify the procedure of device driver dynamic loading for the Space Station Freedom Program.

Liu, Yuan-Kwei

Embedded Data Processor and Portable Computer Technology testbeds

Attention is given to current activities in the Embedded Data Processor and Portable Computer Technology testbed configurations that are part of the Advanced Data Systems Architectures Testbed at the Information Sciences Division at NASA Ames Research Center. The Embedded Data Processor Testbed evaluates advanced microprocessors for potential use in mission and payload applications within the Space Station Freedom Program. The Portable Computer Technology (PCT) Testbed integrates and demonstrates advanced portable computing devices and data system architectures. The PCT Testbed uses both commercial and custom-developed devices to demonstrate the feasibility of functional expansion and networking for portable computers in flight missions.

Alena, Richard

Portable computer system architecture for the Space Station Freedom program

This paper outlines various mission requirements and technical approaches that support the potential use of portable computers in several defined activities within the Space Station Freedom (SSF) program. Specifically, the use of portable computers as consoles for both spacecraft control and payload applications is presented. Various issues and proposed solutions regarding the incorporation of portable computers within the program are presented. The primary issues presented regard architecture (standard interface for expansion, advanced processors and displays), integration (methods of high-speed data communication, peripheral interfaces, and interconnectivity within various support networks), and evolution (wireless communications and multimedia data interface methods).

Alena, Richard

Analysis of the Intel 386 and i486 microprocessors for the Space Station Freedom Data Management System

The feasibility is analyzed of upgrading the Intel 386 microprocessor, which has been proposed as the baseline processor for the Space Station Freedom (SSF) Data Management System (DMS), to the more advanced i486 microprocessors. The items compared between the two processors include the instruction set architecture, power consumption, the MIL-STD-883C Class S (Space) qualification schedule, and performance. The advantages of the i486 over the 386 are (1) lower power consumption; and (2) higher floating point performance. The i486 on-chip cache does not have parity check or error detection and correction circuitry. The i486 with on-chip cache disabled, however, has lower integer performance than the 386 without cache, which is the current DMS design choice. Adding cache to the 386/386 DX memory hierachy appears to be the most beneficial change to the current DMS design at this time.

Liu, Yuan-Kwei

Analysis of the Intel 386 and i486 microprocessors for the Space Station Freedom Data Management System

The feasibility is analyzed of upgrading the Intel 386 microprocessor, which has been proposed as the baseline processor for the Space Station Freedom (SSF) Data Management System (DMS), to the more advanced i486 microprocessors. The items compared between the two processors include the instruction set architecture, power consumption, the MIL-STD-883C Class S (Space) qualification schedule, and performance. The advantages of the i486 over the 386 are (1) lower power consumption; and (2) higher floating point performance. The i486 on-chip cache does not have parity check or error detection and correction circuitry. The i486 with on-chip cache disabled, however, has lower integer performance than the 386 without cache, which is the current DMS design choice. Adding cache to the 386/387 DX memory hierarchy appears to be the most beneficial change to the current DMS design at this time.

Liu, Yuan-Kwei

DMS processor evolution study

Increasing the processor performance and capability has not only become a wish list item for the Space Station Freedom (SSF) Data Management System (DMS), but also a necessity. There are many commercially available processors which have superior performance compared to the 386, but we cannot only consider performance when selecting a processor for the DMS. The processor is the 'foundation' of the DMS. It will affect the local bus, system bus, interface unit, global network, etc., that have been selected for the DMS. Besides, once the processor instruction set architecture (ISA) is selected, all of the important system software will be implemented based on this ISA. Selecting an ISA that has a strong commercial support and can be upgraded in the 30-year life cycle of the Space Station Freedom is one of the most important items for the DMS.

Liu, Yuan-Kwei

Current processor technology survey

This report provides a technology survey on current commercially available microprocessors. This report is part of an effort funded by the Office of Aeronautics, Exploration, and Technology (OAET) and the Space Station Freedom (SSF) Advanced Development program to determine computational needs and capability for advanced automation and robotics. It will be used in conjunction with a user requirements survey to determine a plan to meet computational requirements for future NASA missions.

Liu, Yuan-Kwei

Comparisons between Intel 386 and i486 microprecessors

A quick and preliminary comparison is made between the Intel 386 and i486 microprocessors. The following topics are discussed: the i486 key elements, comparison of instruction set architecture, the i486 on-chip cache characteristics, the i486 multiprocessor support, comparison of performance, comparison of power consumption, comparison of radiation hardening potential, and recommendations for the Space Station Freedom (SSF) Data Management System (DMS).

Liu, Yuan-Kwei