Engineering topics
Publications and source records attributed to Mehdi, I..
Frequency multiplier circuits based on planar GaAs Schottky diodes have made significant advances in the last decade. Useful power in the >1 THz range has now been demonstrated from a complete solid-state chain. This paper will review some of the technology responsible for this achievement along with presenting a brief look at future challenges.
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Substantial proress has been made recently in the advancement of solid state terahertz sources using chains of Schottky diode frequency multipliers. We have developed a harmonic balance simulator and corresponding diode model that incorporates many other factors participating in the diode behavior.
The membrane based planar Schottky diode process has been utilized to design a family of triplers to cover the astronomically important 1400 to 1900 GHz range.
Frequency multipliers are required as local oscillator sources for frequencies up to 2.7 THz for FIRST and airborne applications. Multipliers at these frequencies have not previously been demonstrated, and the object of this work was to show whether such circuits are really practical. A practical circuit is one which not only performs as well as is required, but also can be replicated in a time that is feasible. As the frequency of circuits is increased, the difficulties in fabrication and assembly increase rapidly. Building all of the circuit on GaAs as a monolithic circuit is highly desirable to minimize the complexity of assembly, but at the highest frequencies, even a complete monolithic circuit is extremely small, and presents serious handling difficulty. This is compounded by the requirement for a very thin substrate. Assembly can become very difficult because of handling problems and critical placement. It is very desirable to make the chip big enough to that it can be seen without magnification, and strong enough that it may be picked up with tweezers. Machined blocks to house the chips present an additional challenge. Blocks with complex features are very expensive, and these also imply very critical assembly of the parts. It would be much better if the features in the block were as simple as possible and non-critical to the function of the chip. In particular, grounding and other electrical interfaces should be done in a manner that is highly reproducible.
Fabrication technology for submillimeter-wave monolithic circuits has made tremendous progress in recent years and it is now possible to fabricate sub-micron GaAs Schottky devices on a number of substrate types, such as membranes, frame-less membranes or substrateless circuits. These new technologies allow designers to implement very high frequency circuits, either Schottky mixers or multipliers, in a radically new manner. This paper will address the design, fabrication, and preliminary results of a 1.2 THz planar tripler fabricated on a GaAs frame-less membrane, the concept of which was described previously. The tripler uses a diode pair in an antiparallel configuration similar to designs used at lower frequency. To date, this tripler has produced a peak output power of 80 microW with 0.9% efficiency at room temperature (at 1126 GHz). The measured fix-tuned 3 dB bandwidth is about 3.5%. When cooled, the output power reached a peak of 195 microW at 120 K and 250 microW at 50 K. The ease with which this circuit was implemented along with the superb achieved performance indicates that properly designed planar devices such as this tripler can now usher in a new era of practical very high frequency multipliers.
Diode modeling for Schottky varactor frequency multipliers above 500 GHz is presented with special emphasis placed on simple models and fitted equations for rapid circuit design. Temperature- and doping-dependent mobility, resistivity, and avalanche current multiplication and breakdown are presented. Next is a discussion of static junction current, including the effects of tunneling as well as thermionic emission. These results have been compared to detailed measurements made down to 80 K on diodes fabricated at JPL, followed by a discussion of the effect on multiplier efficiency. Finally, a simple model of current saturation in the undepleted active layer suitable for inclusion in harmonic balance simulators is derived.
This paper will describe a robust test-bed that has been built to measure multiplier performance over a wide range of temperatures and frequencies. In a 182-212 GRz designed balanced doubler the peak efficiency at 201 GHz improves from 22% to 28% upon cooling from 300 K to 120 K. This stage is then used to pump a 362-424 GRz balanced planar doubler. The peak chain efficiency increases from 3.4% to 6% when the two cascaded doublers are cooled from 300 K to 120 K. This enables the production of 10 mW of peak output power at 377 GHz, which ought to be sufficient for driving the next stage multiplier.
This paper describes the design, fabrication, assembly, testing, and performance both at room temperature and at cryogenic temperatures.
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A high power doubler for the frequency band 184 to 212 GHz has been fabricated and tested. The results of the continuing JPL Schottky diode physical modeling effort are discussed, including the effects of temperature and high power operation.
Several sub-millimeter doubler circuits have been designed and built using a new fabrication technology.
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