Engineering topics
Publications and source records attributed to Mitchell, C. L..
CADAT Logic Simulation Program (LOGSIM) checks functional correctness of electronic logic circuit by simulating circuit at logic gate level. LOGSIM also checks propagation delay through logic nets and indicates any timing or "race" problems.
Program uses minimal core and time resources and performs following analysis functions: artwork verification, device identification, nodal analysis, capacitance calculation, and logic equation generation. For data base simplicity, program processing operates on mask data which has been coverted from its original form to orthogonal rectangles.
A document intended to serve as a User's Manual and a Programmer's Manual for the Mask Analysis Program is presented. The first portion of the document is devoted to the user. It contains all of the information required to execute MAP. The remainder of the document describes the details of MAP software logic. Although the information in this portion is not required to run the program, it is recommended that every user review it to gain an appreciation for the program functions.
A programmer's manual is reported for a Logic Simulator (LOGSIM) computer program that is a large capacity event simulator with the capability to accurately simulate the effects of certain unknown states, rise and fall times, and floating nodes in large scale metal oxide semiconductor logic circuits. A detailed description of the software with flow charts is included within the report.
The user's manual for the LOGSIM Program is presented. All program options are explained and a detailed definition of the format of each input card is given. LOGSIM Program operations, and the preparation of LOGSIM input data are discused along with data card formats, postprocessor data cards, and output interpretation.