Engineering topics
Publications and source records attributed to Mojarradi, M. M..
This paper presents measured noise for 0.35(mu)m, silicon-on-insulator devices and a micropower preamplifier following 63-MeV, 1-Mrad (Si) proton irradiation. Flicker noise voltage, important for gyros having low frequency output, increases less than 32% after irradiation.
A high voltage bandgap reference circuit has been designed and implemented in an SOI CMOS technology.
This paper presents a design approach for charging and discharging microbatteries. Maximum flexibility in terms of voltages and currents are also obtained through the use of a switching matrix.
This paper describes several analog circuit primitives that utilize the body terminal as a signal port. A cascode current mirror that can operate with an input and output voltage of 200 mV; and a rail-to-rail, constant transconductance gain block capable of 1 V operation are presented. These circuits have been implemented in a standard 0.35~1 partially-depleted Silicon-on-Insulator (PDSOI) CMOS process and should find wide application in next-generation analog circuit designs.
The four-gate transistor or G4-FET combines MOSFET and JFET principles in a single SOI device. Experimental results reveal that each gate can modulate the drain current. Numerical simulations are presented to clarify the mechanisms of operation. The new device shows enhanced functionality, due to the combinatorial action of the four gates, and opens rather revolutionary applications.
Explore the source record for details and available documents.
Integrated circuit fabrication technology has evolved to the point that it is possible to construct complete systems, including power, data processing, and communications, on a single chip. Such System-on-a-chip (SOAC) technologies can enable drastic reductions in spacecraft size and weight, lowering the cost of missions and presenting new mission opportunities. This paper overviews some key enabling technologies unique to the needs of spacecraft for outer-planet exploration and missions requiring extreme resistance to radiation such as Europa orbiters and Europa Landers. The work is being carried out by Kansas State University (KSU) under direction of the Center for Integrated Space Microsystems (CISM) at NASA's Jet Propulsion Laboratory. Additional information is contained in the original extended abstract.
The current trend for space application systems is towards fully integrated systems-on-a-chip. To facilitate this drive, high-voltage transistors must reside on the same substrate as low-voltage transistors. These systems must also be radiation tolerant, particularly for space missions such as the Europa Lander and Titan Explorer. SOI CMOS technology offers high levels of radiation hardness. As a result, a high-voltage lateral MOSFET has been developed in a partially-depleted (PD) SOI technology. Utilizing high voltages causes a parasitic transistor to have non-negligible effects on a circuit. Several circuit architectures have been used to compensate for the radiation induced threshold voltage shift of the parasitic back-channel transistor. However, a new architecture for high-voltage systems must be employed to bias the substrate to voltage levels insuring all parasitic transistors remain off. An active substrate driver has been developed to accomplish task. Additional information is contained in the original extended abstract.
To build the sensor intensive system-on-a-chip for the next generation spacecrafts for deep space, Center for Integration of Space Microsystems at JPL (CISM) takes advantage of the lower power rating and inherent radiation resistance of Silicon on Insulator technology (SOI). We are developing a suite of mixed-voltage and mixed-signal building blocks in Honeywell's SOI process that can enable the rapid integration of the next generation avionics systems with lower power rating, higher reliability, longer life, and enhanced radiation tolerance for spacecrafts such as the Europa Orbiter and Europa Lander. The mixed-voltage building blocks are predominantly for design of adaptive power management systems. Their design centers around an LDMOS structure that is being developed by Honeywell, Boeing Corp, and the University of Idaho. The mixed-signal building blocks are designed to meet the low power, extreme radiation requirement of deep space applications. These building blocks are predominantly used to interface analog sensors to the digital CPU of the next generation avionics system on a chip. Additional information is contained in the original extended abstract.
Nonvolatile memory (NVM) system that could reliably function in extreme environments is one of the most critical components for many spacecrafts being developed for NASA missions to be launched in next four to seven years. NVM supports the computer system in saving and updating critical state data required for a warm restart after power cycling or in case of a power bus failure. It also provides a power independent mass storage capacity for the scientific data gathered by the instruments. In some cases the window for gathering such data is very small and occurs only once in a given mission. Commercially popular and fully developed Flash NVM technology is inappropriate for many reasons such as the limited read write cycles with slower access speeds, radiation intolerance, higher Single Event Upsets (SEU) rates, etc. It is desirable to have an NVM system based upon a robust cell technology making it immune to the SEUs and with sufficient radiation hardness. Availability of such NVM system seems to be still 5 to 10 years in the future. Meanwhile, it is possible to provide an interim hybrid solution by combining the existing rad-hard technologies. Additional information is contained in the original extended abstract.