Exploring the construction of a domain-aware toolchain for high-performance computing
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Engineering topics
Publications and source records attributed to Moss, Nicholas David.
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The LLVM intermediate representation (IR) lacks semantic constructs for depicting common high-performance operations such as parallel and concurrent execution, communication and synchronization. Currently, representing such semantics in LLVM requires either extending the intermediate form (a signi cant undertaking) or the use of ad hoc indirect means such as encoding them as intrinsics and/or the use of metadata constructs. In this paper we discuss a work in progress to explore the design and implementation of a new compilation stage and associated high-level intermediate form that is placed between the abstract syntax tree and when it is lowered to LLVM's IR. This highlevel representation is a superset of LLVM IR and supports the direct representation of these common parallel computing constructs along with the infrastructure for supporting analysis and transformation passes on this representation.
HLIR is part of the ARES project (Abstract Representations for the Extreme-Scale Stack). Inter-operable tools and approaches from programming next-generation architectures.