Engineering topics
Publications and source records attributed to Noto, R..
Report documents life cycles of two custom CMOS integrated circuits: (1) 4-bit multiplexed register with shift left and shift right capabilities, and (2) dual 4-bit registers. Cycles described include conception as logic diagrams through design, fabrication, testing, and delivery.
Automatic design technique uses standard circuit cells for producing large-scale integrated arrays. Computerized fabrication process provides individual cells of high density and efficiency, quick turnaround time, low cost, and ease of corrections for changes and errors.
A low cost, quick turnaround technique for generating custom metal oxide semiconductor arrays using the standard cell approach was developed, implemented, tested and validated. Basic cell design topology and guidelines are defined based on an extensive analysis that includes circuit, layout, process, array topology and required performance considerations particularly high circuit speed.