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Ou, Eric

Publications and source records attributed to Ou, Eric.

SIREN: Scaling Ion-Traps by REquiring iNnovative Heterogenous Integration

The SIREN (Scaling Ion Traps by Requiring iNnovative heterogenous integration) project explores the feasibility of heterogeneous integration (HI) as a transformative approach to scaling ion traps, a critical technology for advancing quantum computers and atomic clocks. Traditional ion trap architectures face significant challenges in scalability due to limitations in optical access, fabrication techniques, and material constraints. SIREN addresses these challenges by leveraging HI, which combines different materials and fabrication processes to create more complex and efficient ion trap structures. HI integrated structures can be manufactured without compromising the process to maintain compatibility to ion traps. This project focuses on integrating a separately fabricated waveguide with a fully functional ion trap. The respective alignment between the pieces needs to be accurate to less than 2 µm to ensure that the light from the waveguide can overlap with the trapping region. The fine alignment must also be maintained through an ultra-high vacuum bake, a critical step in preparing an ion trap experiment. The project's outcomes suggest that heterogeneous integration is a promising pathway for overcoming current scalability barriers, paving the way for the next generation of quantum technologies. SIREN's findings contribute significantly to the field, offering a scalable solution that could accelerate the development of practical quantum computers and highly accurate atomic clocks.

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Mitigating the Effects of Au-Al Intermetallic Compounds Due to High-Temperature Processing of Surface-Electrode Ion Traps

Stringent physical requirements need to be met for the high-performing surface-electrode ion traps used in quantum computing and timekeeping. In particular, these traps must survive a high-temperature environment for vacuum chamber preparation and support high RF voltage on closely spaced electrodes. Due to the use of gold wire bonds on aluminum pads, intermetallic growth can lead to wire bond failure via breakage or high resistance, limiting the lifetime of a trap assembly to a single multiday bake at 200 ° C. Using traditional thick metal stacks to prevent intermetallic growth, however, can result in trap failure due to RF breakdown events. Through high-temperature experiments, we conclude that an ideal metal stack for ion traps is Ti/Pt/Au (20/100/250 nm), which allows for a cumulative bakeable time of roughly 86 days without compromising the trap voltage performance. This increase in the bakeable lifetime of ion traps will remove the need to discard otherwise functional ion traps when vacuum hardware is upgraded, which will greatly benefit ion trap experiments.

Haltli, Raymond A.