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Palacios, Tomás

Publications and source records attributed to Palacios, Tomás.

6 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Remote-Contact Catalysis for Target-Diameter Semiconducting Carbon Nanotube Arrays

Electrostatic catalysis has been an exciting development in chemical synthesis (beyond enzymes catalysis1 ) in recent years, boosting reaction rates and selectively producing certain reaction products2 . Most of the studies to date have been focused on using external electric field (EEF) to rearrange the charge distribution in small molecule reactions such as Diels-Alder addition3 , carbene reaction4 , etc. However, in order for these EEFs to be effective, a field on the order of 1 V/nm (10 MV/cm) is required, and the direction of the EEF has to be aligned with the reaction axis5 . Such a large and oriented EEF will be challenging for large-scale implementation, or materials growth with multiple reaction axis or steps. Here, we demonstrate that the energy band at the tip of an individual single-walled carbon nanotube6 (SWCNT) can be spontaneously shifted in a high-permittivity growth environment, with its other end in contact with a low-work function electrode (e.g., hafnium carbide or titanium carbide7 ). By adjusting the Fermi level at a point where there is a substantial disparity in the density of states (DOS) between semiconducting (s-) and metallic (m-) SWCNTs8 , we achieve effective electrostatic catalysis for s-SWCNT growth assisted by a weak EEF perturbation (200V/cm). This approach enables the production of high-purity (99.92%) s-SWCNT horizontal arrays with narrow diameter distribution (0.95±0.04 nm), targeting the requirement of advanced SWCNT-based electronics for future computing9-11. These findings highlight the potential of electrostatic catalysis in precise materials growth, especially for s-SWCNTs, and pave the way for the development of advanced SWCNT-based electronics12.

Wang, Jiangtao↗
DOE OSTI2023

1 kV GaN-on-Si Quasi-Vertical Schottky Rectifier

Here, this work demonstrates quasi-vertical GaN Schottky barrier diodes (SBDs) on 6-inch Si substrate with a breakdown voltage (BV) over 1 kV, the highest BV reported in vertical GaN-on-Si SBDs to date. The deep mesa inherently in quasi-vertical devices is leveraged to form a self-aligned edge termination, and the mesa sidewall is covered by the p-type nickel oxide (NiO) as a reduced surface field (RESURF) structure. This novel termination enables a parallel-plane junction electric field of 2.8 MV/cm. The device also shows low turn-on voltage of 0.5 V, and low specific on-resistance of 1.1 mΩ∙ cm 2 . Moreover, the device exhibits excellent overvoltage robustness under the continuous 800 V stress in the unclamped inductive switching test. These results show the good promise of the low-cost vertical GaN-on-Si power diodes.

42 ENGINEERING↗
DOE OSTI2023

Low-thermal-budget synthesis of monolayer molybdenum disulfide for silicon back-end-of-line integration on a 200 mm platform

Two-dimensional (2D) materials are promising candidates for future electronics due to their excellent electrical and photonic properties. Although promising results on the wafer-scale synthesis (≤150 mm diameter) of monolayer molybdenum disulfide (MoS 2 ) have already been reported, the high-quality synthesis of 2D materials on wafers of 200 mm or larger, which are typically used in commercial silicon foundries, remains difficult. The back-end-of-line (BEOL) integration of directly grown 2D materials on silicon complementary metal–oxide–semiconductor (CMOS) circuits is also unavailable due to the high thermal budget required, which far exceeds the limits of silicon BEOL integration (<400 °C). This high temperature forces the use of challenging transfer processes, which tend to introduce defects and contamination to both the 2D materials and the BEOL circuits. Here we report a low-thermal-budget synthesis method (growth temperature < 300 °C, growth time ≤ 60 min) for monolayer MoS 2 films, which enables the 2D material to be synthesized at a temperature below the precursor decomposition temperature and grown directly on silicon CMOS circuits without requiring any transfer process. We designed a metal–organic chemical vapour deposition reactor to separate the low-temperature growth region from the high-temperature chalcogenide-precursor-decomposition region. We obtain monolayer MoS 2 with electrical uniformity on 200 mm wafers, as well as a high material quality with an electron mobility of ~35.9 cm 2 V -1 s -1 . Finally, we demonstrate a silicon-CMOS-compatible BEOL fabrication process flow for MoS 2 transistors; the performance of these silicon devices shows negligible degradation (current variation < 0.5%, threshold voltage shift < 20 mV). We believe that this is an important step towards monolithic 3D integration for future electronics.

77 NANOSCIENCE AND NANOTECHNOLOGY↗