Palmer, James | Search NASA

DOE OSTI2020

Modular Multilevel Converter (MMC) Modeling Considering Submodule Voltage Sensor Noise

The modular multilevel converter (MMC) is a popular topology in medium- and high-voltage applications, and many efforts have been spent on MMC modeling. However, the impact of submodule voltage sensor noise (SVSN), which becomes more severe due to increasing switching speed of power semiconductors and compact submodule design, has not been considered in conventional models. In this letter, the SVSN is introduced by coupling capacitances between the sensor and power stage in an MMC switching model. Furthermore, the SVSN impact is considered in an MMC average model based on derivation of the relationship between the SVSN and the duty cycle. Here, the proposed MMC switching model and average model considering the SVSN are validated by comparing simulations with experimental results in an MMC prototype using 10-kV SiC MOSFETS.

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DOE OSTI2020

A Novel Voltage Balancing Control With dv/dt Reduction for 10-kV SiC MOSFET-Based Medium Voltage Modular Multilevel Converter

Using high voltage (HV) silicon carbide (SiC) power semiconductors in a modular multilevel converter (MMC) is promising because it results in fewer submodules and lower switching loss compared to conventional Si based solutions. The nearest level pulsewidth modulation (NL-PWM) is commonly used in the MMC for medium voltage applications. However, with the NL-PWM and existing voltage balancing control, there are many submodules that switch their modes in a control cycle, resulting in a high dv/dt during the deadtime of the power semiconductor, which could be multiple times of the dv/dt of the single device. This poses great challenges on the noise immunity and insulation design in the MMC using HV SiC devices, which have very fast switching speed. A novel voltage balancing control, which ensures only two submodules switch their modes in a control cycle, is proposed in this article, limiting the maximum dv/dt to the dv/dt of a single power semiconductor and also maintaining the voltage balance performance. Furthermore, the proposed voltage balancing control is experimentally validated in a 10-kV SiC mosfet based MMC with four submodules per arm.

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