Engineering topics

Ramanathan, P.

Publications and source records attributed to Ramanathan, P..

4 records

NASA NTRS1990

Hardware-assisted software clock synchronization for homogeneous distributed systems

A clock synchronization scheme that strikes a balance between hardware and software solutions is proposed. The proposed is a software algorithm that uses minimal additional hardware to achieve reasonably tight synchronization. Unlike other software solutions, the guaranteed worst-case skews can be made insensitive to the maximum variation of message transit delay in the system. The scheme is particularly suitable for large partially connected distributed systems with topologies that support simple point-to-point broadcast algorithms. Examples of such topologies include the hypercube and the mesh interconnection structures.

Ramanathan, P.↗

NASA NTRS1988

Reliable broadcast in hypercube multicomputers

A simple algorithm for broadcasting in a hypercube multicomputer containing faulty nodes/links is proposed. The algorithm delivers multiple copies of the broadcast message through disjoint paths to all the modes in the system. Its salient feature is that the delivery of the multiple copies is transparent to the processes receiving the message and does not require the processes to know the identity of the faulty processors. The processes on nonfaulty nodes that receive the message identify the original message from the multiple copies using some scheme appropriate for the fault model used. The algorithm completes in n + 1 steps if each node can simultaneously use all of its outgoing links. If each node cannot use more than one outgoing link at a time, then the algorithm requires 2n steps.

Ramanathan, P.↗

NASA NTRS1988

Transmission delays in hardware clock synchronization

Various methods, both with software and hardware, have been proposed to synchronize a set of physical clocks in a system. Software methods are very flexible and economical but suffer an excessive time overhead, whereas hardware methods require no time overhead but are unable to handle transmission delays in clock signals. The effects of nonzero transmission delays in synchronization have been studied extensively in the communication area in the absence of malicious or Byzantine faults. The authors show that it is easy to incorporate the ideas from the communication area into the existing hardware clock synchronization algorithms to take into account the presence of both malicious faults and nonzero transmission delays.

Shin, Kang G.↗

NASA NTRS1987

Clock synchronization of a large multiprocessor system in the presence of malicious faults

An interconnection algorithm is presented for achieving clock synchronization in a multiprocessor system. The system is assumed to be maliciously faulty, i.e., some processors are out of synchronization and lie about their clock state to other intragroup or intergroup processors. A phase-locked clock network design is proposed which groups the clocks in the system into diverse clusters. The clusters are then treated as single clock units from the perspective of the network. The algorithm minimizes the number of interconnections while permitting synchronization of large multiprocessor systems controlling time-critical applications such as aircraft, nuclear reactors and industrial processes.

Shin, Kang G.↗