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Schaefer, D. H.

Publications and source records attributed to Schaefer, D. H..

26 records · Page 2

Simple circuit performs binary addition and subtraction

Ripple adder reduces the number of logic circuits required to preform binary addition and subtraction. The adder uses dual input and delayed output flip-flops in one register. The contents of this register are summed with those of a standard register through conventional AND/gates.

Cliff, R. A.

Simple pulse counting circuit computes sum of squares

Pulse counting circuit with an extra chain of flip-flops, delay lines, and gates computes the sum of the squares of the pulse sequences. A pulse train and the sum of the squares of the pulses are simultaneously completed.

Schaefer, D. H.