Engineering topics
Publications and source records attributed to Smith, R. Peter.
An aperture coupled patch splits energy from two different polarization components to different locations to spread heat. In addition, there is no physical electrical connection between the slot, patch and circuitry. The circuitry is located under a ground plane which shields against harmonic radiation back to the RF source.
We report on the performance of a novel W-band amplifier fabricated utilizing very compact bump bonds. We bump-bonded a high-speed, low-noise InP high electron mobility transistor (HEMT) onto a separately fabricated passive circuit having a GaAs substrate. The compact bumps and small chip size were used for efficient coupling and maximum circuit design flexibility. This new quasi-monolithic millimeter-wave integrated circuit (Q-MMIC) amplifier exhibits a peak gain of 5.8 dB at approx. 90 GHz and a 3 dB bandwidth of greater than 25%. To our knowledge, this is the highest frequency amplifier assembled using bump-bonded technology. Our bump-bonding technique is a useful alternative to the high cost of monolithic millimeter-wave integrated circuits (MMIC's). Effects of the bumps on the circuit appear to be minimal. We used the simple matching circuit for demonstrating the technology - future circuits would have all of the elements (resistors, via holes, bias lines, etc.) included 'in conventional MMIC's. Our design in different from other investigators' efforts in that the bumps are only 8 microns thick by 15 microns wide. The bump sizes were sufficiently small that the devices, originally designed for W-band hybrid circuits, could be bonded without alteration. Figure 3 shows the measured and simulated magnitude of S-parameters from 85-120 GHz, of the InP HEMT bump-bonded to the low noise amplifier (LNA) passive. The maximum gain is 5.8 dB at approx. 90 GHz, and gain extends to 117 GHz. Measurement of a single device (without matching networks) shows approx. 1 dB of gain at 90 GHz. The measured gain of the amplifier agrees well with the design in the center of the measurement band, and the agreement falls off at the band edges. Since no accommodation for the bump-bonding parasitics was made in the design, the result implies that the parasitic elements associated with the bonding itself do not dominate the performance of the LNA circuit. It should be noted that this amplifier was designed for good noise performance, which is why the input and output return losses are poorer than one would expect for an amplifier simply matched for gain. However, noise performance has not been measured at this time. While the agreement between modeled vs. experimental data is not exact, the data prove that bump-bonded technology can be used for amplifiers at frequencies at least as high as 100 GHz. JPL is pursuing this technology as a way to economically and quickly incorporate the best available HEMTs into a circuit with all of the reliability and circuit design flexibility offered by MMIC technology. We are currently using the technology to fabricate 4-stage, wide-band, W-band LNA's. We have also performed pull and shear tests which show that the bump bonds are sufficiently robust for any anticipated application.
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Two reports present further detailed information about odd-harmonic frequency-multiplier devices described in "Barrier/n/n+ Varactor Frequency Multipliers" (NPO-18428). Devices comprise Schottky-barrier/n/n+ diodes in planar back-to-back configuration.
Proposed Quartz substrate Upside-down Integrated Device (QUID) relies on UV-curable adhesive to bond semiconductor with quartz. Integrated circuits including planar GaAs Schottky diodes and passive circuit elements (such as bandpass filters) fabricated on quartz substrates. Circuits designed to operate as mixers in waveguide circuit at millimeter and submillimeter wavelengths. Integrated circuits mechanically more robust, larger, and easier to handle than planar Schottky diode chips. Quartz substrate more suitable for waveguide circuits than GaAs substrate.
The back-to-back barrier-N-N(+) (bbBNN) varactor is a nonlinear device being developed for frequency multiplier applications above 100 GHz. Its symmetrical C-V characteristic, low series resistance, freedom from external bias and suitability to planarization make it an ideal choice for high frequency, low power, odd harmonic generation. In this paper, the performance of a 220-GHz waveguide tripler using, for the first time, a planar GaAs bbBNN device integrated on a quartz microstrip circuit is presented. A new split-waveguide block design has been employed to provide the proper embedding impedances to the device at the input and third harmonic output frequencies. A flange-to-flange tripling efficiency of 7% has been obtained at 220 GHz with an output power in excess of 700 mu W. This is believed to be the highest conversion efficiency yet reported for a tripler with an integrated device at this frequency. Theoretical calculations indicate that substantial improvement is possible with modest changes to the device and circuit parameters.
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This paper describes the performance of planar back-to-back Barrier-N-N+ (bbBNN) devices for mm and submm wave multiplier applications. A technique has been developed for characterizing planar bbBNN devices with Vector Network Analyzer, which gives both the series resistance and voltage dependent capacitance of the device.
Improved grid-array amplifiers operating at millimeter and submillimeter wavelengths developed for use in communications and radar. Feedback suppressed by making input polarizations orthogonal to output polarizations. Amplifier made to oscillate by introducing some feedback. Several grid-array amplifiers concatenated to form high-gain beam-amplifying unit.
A new varactor diode process has been developed in which much of the processing is done from the back of an extremely thin semiconductor wafer laminated to a low-dielectric substrate. Back-to-back BNN diodes were fabricated with this technique; excellent DC and low-frequency capacitance measurements were obtained. Advantages of the new technique relative to other techniques include greatly reduced frontside wafer damage from exposure to process chemicals, improved capability to integrate devices (e.g. for antenna patterns, transmission lines, or wafer-scale grids), and higher line yield. BNN diodes fabricated with this technique exhibit approximately the expected capacitance-voltage characteristics while showing leakage currents under 10 mA at voltages three times that needed to deplete the varactor. This leakage is many orders of magnitude better than comparable Schottky diodes.