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Thiagarajan, Ramanathan (ORCID:0000000195929661)

Publications and source records attributed to Thiagarajan, Ramanathan (ORCID:0000000195929661).

PV Inverter Testing for Momentary Cessation and Rate-of-Change-of-Frequency Events: Preprint

To understand the power system stability and develop better electromagnetic transient (EMT) models of field deployed photovoltaic (PV) inverters, it is important to characterize inverters' response to abnormal voltage and frequency scenarios. Because EMT models are not typically available for small distribution-connected PV inverters, and because inerterconnection standards historically did not specify desired ride-through behaviors, we tested two such inverters in the lab to characterize their responses to severe undervoltage events and high rate-of-change-of-frequency (ROCOF) conditions. The inverters tested were pre-IEEE 1547-2018 residential PV inverters widely used in the Hawaiian Electric territory and many other areas. The testing results for undervoltage scenarios showed that the inverter from one vendor exhibited momentary cessation while the inverter from the other vendor did not exhibit momentary cessation behavior or tripping for most of the events below the 120 ms undervoltage trip threshold duration set by IEEE 1547-2003. The testing results for ROCOF scenarios showed that the inverter from one vendor temporarily lost synchronization during ROCOF conditions while the inverter from the other vendor did not lose synchronization or cease generation for any ROCOF conditions. Both the inverters were also tested for EMT-simulated grid events with severe changes in frequency and voltage. The observed responses of the inverters were different from the simulated response of PV inverters represented the best available assumptions from pre-existing information. The results from these experiments can be used to update the inverter models used in bulk power system studies.

IEEE 1547 2018↗

Moisture Ingress Models of Film Capacitors in PV Inverters

This presentation discusses the methodology for developing moisture ingress models for components inside a PV inverter. This method uses time series-based analyses for moisture ingress unlike a single maximum temperature, humidity, and voltage setpoint used in Hallberg-Peck equations. Experiments were performed for determination of moisture ingress time to estimate moisture ingress in and out of the capacitor device under normal and extreme temperatures and RH conditions.

film capacitors↗

Modeling and Feedback Compensator Design for Power-Hardware-in-the-Loop System for Medium-Voltage Grid-Connected Power Converters

Hardware-in-the-loop (HIL) evaluation is a method in which the test subject is split into a physical part and a simulated part, and these parts are connected with interfaces to form a combined physical-numerical system. Power-hardware-in-the-loop (PHIL) systems, where actual hardware is connected to a real-time model, can exhibit issues of instability, inaccuracy and errors when operating in a closed-loop. The challenges of generating a PHIL setup are that, first, because of the limited dynamic response of the different parts of the system, the test results might be inaccurate, and, second, because of the high frequency noise introduced by the sensors to the closed-loop system, it can be difficult to design a compensator for the real-time emulator response, while stabilizing the closed-loop system at the same time. In this paper, different parts of a PHIL system are characterized, and the feedback compensator system design is proposed for the stable operation of the closed-loop PHIL system. The issues as observed in a PHIL system without any compensator are demonstrated using experimental results, and the effectiveness of a first order phase lead compensator is validated.

compensator design↗

Automating Component-Level Stress Measurements for Inverter Reliability Estimation

In the near future, grid operators are expected to regularly use advanced distributed energy resource (DER) functions, defined in IEEE 1547-2018, to perform a range of grid-support operations. Many of these functions adjust the active and reactive power of the device through commanded or autonomous operating modes which induce new stresses on the power electronics components. In this work, an experimental and theoretical framework is introduced which couples laboratory-measured component stress with advanced inverter functionality and derives a reduction in useful lifetime based on an applicable reliability model. Multiple DER devices were instrumented to calculate the additional component stress under multiple reactive power setpoints to estimate associated DER lifetime reductions. A clear increase in switch loss was demonstrated as a function of irradiance level and power factor. This is replicated in the system-level efficiency measurements, although magnitudes were different—suggesting other loss mechanisms exist. Using an approximate Arrhenius thermal model for the switches, the experimental data indicate a lifetime reduction of 1.5% when operating the inverter at 0.85 PF—compared to unity PF—assuming the DER failure mechanism thermally driven within the H-bridge. If other failure mechanisms are discovered for a set of power electronics devices, this testing and calculation framework can easily be tailored to those failure mechanisms.

Flicker, Jack (ORCID:0000000212232154)↗