Engineering topics

Trujillo, Joshua

Publications and source records attributed to Trujillo, Joshua.

3 records

DOE OSTI2023

An Integrated Testbed for Trojans in Printed Circuit Boards with Fuzzing Capabilities

This paper showcases an all-in-one testing environment that combines Trojan detection and fuzzing capabilities for printed circuit boards using the OpenPLC “NYU Trojan Edition” and a dedicated Trojan detection framework. The demo system is self-contained and equipped with two OpenPLC-based boards (one with a Trojan and one without), and automated tools for inserting the Trojan and collecting side-channel data. We developed a graphical user interface for interactive Trojan selection, data visualization, and anomaly detection analysis.

Trojan detection, anomaly detection, PCB, timing l↗

DOE OSTI2022

Detecting Hardware Trojans in PCBs Using Side Channel Loopbacks

Malicious modifications to printed circuit boards (PCBs) are known as hardware Trojans. These may arise when malafide third parties alter PCBs premanufacturing or postmanufacturing and are a concern in safety-critical applications, such as industrial control systems. In this research, we examine how data-driven detection can be utilized to detect such Trojans at run-time. We develop a flexible and reconfigurable PCB test bed derived from the popular open-source programmable logic controller (PLC) platform “OpenPLC.” We then develop a Trojan detection framework, which utilizes and analyzes multimodal side channels (e.g., timing, magnetic signals, power, and hardware performance counters). We consider defender-configurable input/output (I/O) loopback test, comparison with design-document baselines, and magnetometer-aided monitoring of system behavior under defender-chosen excitations. Our approach can extend to golden-free environments. Golden (known-good) versions of the PCBs are assumed not available, but design information, datasheets, and component-level data are available. We demonstrate the efficacy of our approach on a range of Trojans instantiated in the test bed.

42 ENGINEERING↗

DOE OSTI2022

System and method for obfuscation of electronic circuits

A computer-implemented method of generating randomized electrical interconnects for an electronic circuit comprises steps of receiving a netlist of nodes of electronic components to be connected, each connection between the nodes forming an electrical interconnect; determining a list of one or more path directions for each electrical interconnect; determining a plurality of path direction distances for each electrical interconnect; generating a plurality of segments for each electrical interconnect, each segment having one path direction and a length which are selected at random; calculating a sum of the lengths of all segments of the plurality of segments in each path direction each time a segment is generated for each electrical interconnect; removing one path direction from the list of path directions when a first condition is met; and stopping the generating a plurality of segments for each electrical interconnect when a second condition is met.

Trujillo, Joshua↗