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Vashchenko, Vladislav

Publications and source records attributed to Vashchenko, Vladislav.

Accelerated Aging with Electrical Overstress and Prognostics for Power MOSFETs

Power electronics play an increasingly important role in energy applications as part of their power converter circuits. Understanding the behavior of these devices, especially their failure modes as they age with nominal usage or sudden fault development is critical in ensuring efficiency. In this paper, a prognostics based health management of power MOSFETs undergoing accelerated aging through electrical overstress at the gate area is presented. Details of the accelerated aging methodology, modeling of the degradation process of the device and prognostics algorithm for prediction of the future state of health of the device are presented. Experiments with multiple devices demonstrate the performance of the model and the prognostics algorithm as well as the scope of application. Index Terms Power MOSFET, accelerated aging, prognostics

Saha, Sankalita↗

Accelerated Aging System for Prognostics of Power Semiconductor Devices

Prognostics is an engineering discipline that focuses on estimation of the health state of a component and the prediction of its remaining useful life (RUL) before failure. Health state estimation is based on actual conditions and it is fundamental for the prediction of RUL under anticipated future usage. Failure of electronic devices is of great concern as future aircraft will see an increase of electronics to drive and control safety-critical equipment throughout the aircraft. Therefore, development of prognostics solutions for electronics is of key importance. This paper presents an accelerated aging system for gate-controlled power transistors. This system allows for the understanding of the effects of failure mechanisms, and the identification of leading indicators of failure which are essential in the development of physics-based degradation models and RUL prediction. In particular, this system isolates electrical overstress from thermal overstress. Also, this system allows for a precise control of internal temperatures, enabling the exploration of intrinsic failure mechanisms not related to the device packaging. By controlling the temperature within safe operation levels of the device, accelerated aging is induced by electrical overstress only, avoiding the generation of thermal cycles. The temperature is controlled by active thermal-electric units. Several electrical and thermal signals are measured in-situ and recorded for further analysis in the identification of leading indicators of failures. This system, therefore, provides a unique capability in the exploration of different failure mechanisms and the identification of precursors of failure that can be used to provide a health management solution for electronic devices.

Celaya, Jose R.↗

Effect of Electrostatic Discharge on Electrical Characteristics of Discrete Electronic Components

This article reports on preliminary results of a study conducted to examine how temporary electrical overstress seed fault conditions in discrete power electronic components that cannot be detected with reliability tests but impact longevity of the device. These defects do not result in formal parametric failures per datasheet specifications, but result in substantial change in the electrical characteristics when compared with pristine device parameters. Tests were carried out on commercially available 600V IGBT devices using transmission line pulse (TLP) and system level ESD stress. It was hypothesized that the ESD causes local damage during the ESD discharge which may greatly accelerate degradation mechanisms and thus reduce the life of the components. This hypothesis was explored in simulation studies where different types of damage were imposed to different parts of the device. Experimental results agree qualitatively with the simulation for a number of tests which will motivate more in-depth modeling of the damage.

Wysocki, Phil↗