Engineering topics
Publications and source records attributed to Vincent, P..
ERS-1 radar images acquired 14 months apart studied by differential radar interferometry show the wide area distribution of aseismic creep along the fault segment northwest of Parkfield, California.
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The research project has two kinds of objectives. The first is focused on the regional validation of the altimeter, orbit, and mean sea surface; it will be performed in close cooperation with the local validation performed at Lampedusa/Lampione (Italy). The second deals with the geophysical and oceanographic research of interest in this area.
Ocean tides must be considered in many scientific disciplines: astronomy, oceanography, geodesy, geophysics, meteorology, and space technologies. Progress in each of these disciplines leads to the need for greater knowledge and more precise predictions of the ocean tide contribution. This is particularly true of satellite altimetry. On one side, the present and future satellite altimetry missions provide and will supply new data that will contribute to the improvement of the present ocean tide solutions. On the other side, tidal corrections included in the Geophysical Data Records must be determined with the maximum possible accuracy. The valuable results obtained with satellite altimeter data thus far have not been penalized by the insufficiencies of the present ocean tide predictions included in the geophysical data records (GDR's) because the oceanic processes investigated have shorter wavelengths than the error field of the tidal predictions, so that the residual errors of the tidal corrections are absorbed in the empirical tilt and bias corrections of the satellite orbit. For future applications to large-scale oceanic phenomena, however, it will no longer be possible to ignore these insufficiencies.
This paper reports a single 8.2mm by 8.4mm, 200,000 transistor CMOS chip implementation of the Reed Solomon code required by the Space Telescope. The chip features a 10 MHz sustained byte rate independent of error pattern. The 1.6 micron CMOS integrated circuit has complete decoder and encoder functions and uses a single data/system clock. Block lengths up to 255 bytes as well as shortened codes are supported with no external buffering. Erasure corrections as well as random error corrections are supported with programmable corrections of up to 10 symbol errors. Correction time is independent of error pattern and the number of errors.