Engineering topics

Walden, Aaron

Publications and source records attributed to Walden, Aaron.

3 records

DOE OSTI2023

Efficient GPU Implementation of Automatic Differentiation for Computational Fluid Dynamics

Many scientific and engineering applications require repeated calculations of derivatives of output functions with respect to input parameters. Automatic Differentiation (AD) is a method that automates derivative calculations and can significantly speed up code development. In Computational Fluid Dynamics (CFD), derivatives of flux functions with respect to state variables (Jacobian) are needed for efficient solutions of the nonlinear governing equations. AD of flux functions on graphics processing units (GPUs) is challenging as flux computations involve many intermediate variables that create high register pressure and require significant memory traffic because of the need to store the derivatives. This paper presents a forward-mode AD method based on multivariate dual numbers that addresses these challenges and simultaneously reduces the floating-point operation count. The dimension of the multivariate dual numbers is optimized for performance. The flux computations are restructured to minimize the number of temporary variables and reduce register pressure. For effective utilization of memory bandwidth, shared memory is used to store the local flux Jacobian. This AD implementation is compared with several other Jacobian implementations on an NVIDIA V100 GPU (V100). For three-dimensional perfect-gas compressible-flow equations implemented in a practical CFD code, the AD implementation of a flux Jacobian based on multivariate dual numbers of dimension 5 outperforms all other GPU AD implementations on V100. Its performance is comparable with the optimized hand-differentiated version. Finally, the implementation achieves 75% of the peak floating-point throughput and 61 % of the peak global device memory bandwidth usage.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

DOE OSTI2016

Optimizing Dirac Wilson Operator and linear solvers for Intel KNL

Lattice Quantumchromodynamics (QCD) is a powerful tool to numerically access the low energy regime of QCD in a straightforward way with quantifyable uncertainties. In this approach, QCD is discretized on a four dimensional, euclidian space-time grid with millions of degrees of freedom. In modern lattice calculations, most of the work is still spent in solving large, sparse linear systems. This part has two challenges, i.e. optimizing the sparse matrix application as well as BLAS-like kernels used in the linear solver. We are going to present performance optimizations of the Dirac operator (dslash) with and without clover term for recent Intel architectures, including Knights Landing (KNL). Using only a single right hand side, we were able to achieve a good fraction of peak performance for slash, CG and BiCGStab. We will also present a series of experiments we performed on KNL, i.e. running MCDRAM in different modes, enabling or disabling hardware prefetching, using different SoA lengths as well as different sub-NUMA-clustering modes.

Joó, Bálint↗

DOE OSTI2016

Optimizing a Multiple Right-Hand Side Dslash Kernel for Intel Knights Corner

Lattice Quantum Chromo-dynamics (LQCD) stands unique as the only computationally tractable, non-perturbative, and model-independent quantum field theory of the strong nuclear force. LQCD achieves tractability by discretizing our familiar 4-dimensional space-time onto a hypercubic lattice. The core component of the linear solver used in LQCD is the Wilson-Dirac operator whose finite difference component is called the Dslash operator. Dslash is a nearest neighbor stencil operator summing matrix-vector multiplications over lattice points. The arithmetic intensity of a regular Dslash operator acting on a single vector in single precision is between 0.88-2.29 (depending on the tricks employed) making it memory bandwidth bound on most current architectures, including Xeon Phi. Maximizing the performance of Dslash on Xeon Phi requires deliberate exploitation of its architectural features. One key feature of Xeon Phi is its powerful vector processing unit with lengthy vector registers. There is a class of LQCD computations which aims to solve the Dirac equation for the same lattice gauge fields multiple times. In this case one can gain additional reuse of the gauge field, and potentially simplified vectorization, through applying Dslash to several vectors at the same time; often referred to as Multiple Right Hand Side (MRHS) Dslash. Previous work in this area focused on applying this approach to the Highly Improved Staggered operator, and in cases to the multi-Grid algorithm for Wilson clover fermions. Here, we present two approaches to MRHS Dslash: a vector register blocking approach and one using the software package QPhiX with a custom Code Generator for low-level intrinsics. We explore the Knights Corner instruction set, memory hierarchy, and threading capabilities. For standard lattice sizes used in testing, we observed significant speedups, with sustained performance of over 700 GFLOPS (single precision) in one instance. We achieved up to 27% of theoretical peak performance compared to a maximum of 12% obtained by the previous single RHS method in QPhiX.

Joó, Bálint↗