Engineering topics

Walker, Alvernon

Publications and source records attributed to Walker, Alvernon.

4 records

NASA NTRS2001

An Approach for Self-Timed Synchronous CMOS Circuit Design

In this letter we present a timing and control strategy that can be used to realize synchronous systems with a level of performance that approaches that of asynchronous circuits or systems. This approach is based upon a single-phase synchronous circuit/system architecture with a variable period clock. The handshaking signals required for asynchronous self-timed circuits are not needed. Dynamic power supply current monitoring is used to generate the timing information, that is comparable to the completion signal found in self-timed circuits; this timing information is used to modi@ the circuit clock period. This letter is concluded with an example of the proposed approach applied to a static CMOS ripple-carry adder.

Walker, Alvernon↗

NASA NTRS2001

A Step Response Based Mixed-Signal BIST Approach for Continuous-time Linear Circuits

A new Mixed-Signal Built-in self-test approach that is based upon the step response of a reconfigurable (or multifunction) analog block is presented in this paper. The technique requires the overlapping step response of the Circuit Under Test (CUT) for two circuit configurations. Each configuration can be realized by changing the topology of the CUT or by sampling two CUT nodes with differing step responses. The technique can effectively detect both soft and hard faults and does not require an analog-to-digital converter (ADC) and/or digital-to-analog converter(DAC). It also does not require any precision voltage sources or comparators. This approach does not require any additional analog circuits to realize the test signal generator and sample circuits. The paper is concluded with the application of the proposed approach to a circuit found in the work of Epstein et al and two ITC 97 analog benchmark circuits.

Walker, Alvernon↗

NASA NTRS2001

A Step Response Based Mixed-Signal BIST Approach

A new Mixed-Signal Built-in Self-test approach that is based upon the step response of a reconfigurable (or multifunction) analog block is presented in this paper. The technique requires the overlapping step response of the Circuit Under Test (CUT) for two circuit configurations. Each configuration can be realized by changing the topology of the CUT or by sampling two CUT nodes with differing step responses. The technique can effectively detect both soft and hard faults and does not require an analog-to-digital converter (ADC) and/or digital-to-analog converter( DAC). It also does not require any precision voltage sources or comparators. The approach does not require any additional analog circuits to realize the test signal generator and a two input analog multiplexer for CUT test node sampling. The paper is concluded with the application of the proposed approach to a circuit found in the work of Epstein et a1 and two ITC 97 analog benchmark circuits.

Walker, Alvernon↗

NASA NTRS2001

Self-Timed Digital System Design

A timing and control strategy that can be used to realize synchronous systems with a level of performance that approaches that of asynchronous circuits or systems was developed in this work. This approach is based upon a single-phase synchronous circuit/system architecture with a variable period clock. The handshaking signals required for asynchronous self-timed circuits are not needed. Dynamic power supply current monitoring is used to generate the timing information, that is comparable to the completion signal found in self-timed circuits; this timing information is used to modify the circuit clock period.

Walker, Alvernon↗