Wood, Joseph | Search NASA

DOE OSTI2022

Defect redistribution along grain boundaries in SrTiO 3 by externally applied electric fields

During thermal annealing at 1425 °C nominal electric field strengths of 50 V/mm and 150 V/mm were applied along the grain boundary planes of a near 45° (100) twist grain boundary in SrTiO 3 . Electron microscopy characterization revealed interface expansions near the positive electrode around 0.8 nm for either field strength. While the interface width decreased to roughly 0.4 nm after annealing at 50 V/mm, the higher field strength caused decomposition of the boundary structure close to the negative electrode. Electron energy-loss and X-ray photoelectron spectroscopies demonstrated an increased degree of oxygen sublattice distortion at the negative electrode side, and enhanced concentrations of Ti 3+ and Ti 2+ compared to bulk for both single crystals and bicrystals annealed with an external electric field, respectively. Oxygen migration due to the applied electric field causes the observed alteration of grain boundary structures. At sufficiently high field strength the agglomeration of anion vacancies may lead to the decomposition of the grain boundary.

36 MATERIALS SCIENCE↗

DOE OSTI2022

Geranium Photodiodes for Hard Xray Detection

This report summarizes the investigations engaged at UC Davis under subcontract B632083, as related to the LLNL-LDRD Project “High-Speed X-Ray Imager Arrays.” The first section entails work done within the Electrical and Computer Engineering (ECE) Department. The purpose of the work done so far is to understand photodiode design and which parameters are conducive to the design goals, which are: I: Maximize the detector quantum efficiency. The device must have a quantum efficiency of roughly 5% at 80 keV. II: Minimize temporal response. Collection time is limited to 1ns. All charge must be collected in that time. III: Minimize dark current. In this document, various photodiode parameters and designs are explored, and their impact on these goals are tabulated. In addition to these, various instruments that have been constructed for either testing these parameters or helping teammates with their experiments. The second section entails work done with the Materials Science Engineering (MSE) Department. In accordance with the proposed development of the germanium ROIC backside imagers, a critical step in the micromachining of these devices was the removal of the substrate on which the PIN junctions were epitaxially grown. A common technique for the micromachining of silicon wafers is the use of chemical etching alongside an “etch-stop” layer. In this technique, a chemical etchant will remove material until it reaches the etch-stop layer, at which the etch rate will drop significantly. This high selectivity (ratio of etch rates) allows any unevenness in the initial etching to be effectively smoothed away in the event that part of the wafer surface reaches the etch-stop layer sooner than another. An initial literature review found a paper by Divan et al. in which the authors used ion implantation to dope germanium wafers and achieve selectivity on the order of 100, sufficient for a reliable etch-stop.

42 ENGINEERING↗