Engineering topics

Yoo, S. J. Ben

Publications and source records attributed to Yoo, S. J. Ben.

6 records

DOE OSTI2023

New trends in photonic switching and optical networking architectures for data centers and computing systems [Invited]

The rapid increases in data traffic coupled with user preferences are driving the data center and computing system service providers to offer energy-efficient, intelligent, flexible, cost-effective, high-capacity, and low-latency data services without added complexity to the users. Disaggregated heterogeneous reconfigurable computing systems realized by photonic switching and interconnects can enhance throughput and energy efficiency for artificial intelligence/machine learning (AI/ML) workloads, especially when aided by the AI/ML-enhanced control plane. Photonic switching and new optical networking architectures are expected to solve many of these challenging problems. This paper discusses new trends in photonic switching and optical network architectures for future data centers and computing systems summarized as follows: (1) flat reconfigurable disaggregated computing enabled by high-radix photonic switching and interconnects in data centers; (2) chiplet-based computing architectures empowered by embedded photonics toward heterogeneous reconfigurable computing; (3) nanosecond-scale photonic switching in data centers and computing systems; (4) AI/ML in self-driving, application-aware, and situation-aware data centers; (5) the emergence of flexible networking for cloud computing, edge computing, and split computing, as well as flexible networking for 5G/6G RF-optical networks; and (6) the deployment of embedded co-designed silicon photonics being considered for future data centers.

Yoo, S. J. Ben (ORCID:0000000274201871)↗

DOE OSTI2021

Hybrid integrated photonic platforms: opinion

While photonic integration has made remarkable progress in recent years, there is no one integrated photonic platform that offers all desired functionalities and manufacturability on the same platform. GaAs and InP-based optoelectronic integrated circuits (OEICs) were very popular in the past decades; however, silicon photonics has recently emerged as a preferred platform due to its high-density and high-yield manufacturability leveraging the CMOS ecosystem, although it lacks optical gain, the Pockels effect, and other characteristics. On the other hand, hybrid photonic integration adds new and diverse functionalities to the host materials like silicon. This opinion paper investigates hybrid integrated photonic platforms, and discusses the new functionalities added to the silicon CMOS photonic platform.

42 ENGINEERING↗

DOE OSTI2021

Machine-learning-aided cognitive reconfiguration for flexible-bandwidth HPC and data center networks [Invited]

This paper proposes a machine-learning (ML)-aided cognitive approach for effective bandwidth reconfiguration in optically interconnected datacenter/high-performance computing (HPC) systems. The proposed approach relies on a Hyper-X-like architecture augmented with flexible-bandwidth photonic interconnections at large scales using a hierarchical intra/inter-POD photonic switching layout. We first formulate the problem of the connectivity graph and routing scheme optimization as a mixed-integer linear programming model. A two-phase heuristic algorithm and a joint optimization approach are devised to solve the problem with low time complexity. Then, we propose an ML-based end-to-end performance estimator design to assist the network control plane with intelligent decision making for bandwidth reconfiguration. Numerical simulations using traffic distribution profiles extracted from HPC applications traces as well as random traffic matrices verify the accuracy performance of the ML design estimator ( < <#comment/> 9 % <#comment/> error) and demonstrate up to 5 × <#comment/> throughput gain from the proposed approach compared with the baseline Hyper-X network using fixed all-to-all intra/inter-portable data center interconnects.

Chen, Xiaoliang (ORCID:0000000278056237)↗

DOE OSTI2020

Phase I Final Technical Report on Energy-Efficient Reconfigurable Universal Accelerator Interconnect

It is well known that application specific computing systems, optimally designed and configured for a given workload, offer much higher energy-efficiency and throughput than general purpose systems. In modern computing systems, heterogeneous computing systems have emerged that exploit the energy and performance benefits of combining various different domain-specific processor architectures. Application domains such as high-performance computing and machine learning now process terabyte-sized data sets, requiring enormous processing and memory resources. These applications have very high-power consumption due to bottlenecks in the electrical interconnection between processing units. This project aims to reduce both communication energy and latency by integrating universally available accelerators with silicon photonics. It also aims to increase system throughput by exploiting emerging technologies in silicon photonic reconfigurable interconnects; this will allow the system to balance itself in real time to accommodate changes in workloads and data flows.

2.5D/3D integration↗

NASA NTRS2017

Low-Mass Planar Photonic Imaging Sensor

Continuing on the successful progress of NIAC (NASA Innovative Advanced Concepts) Phase I, this report summarizes the technical progress achieved under NIAC Phase II during the performance period September 19, 2014 to June 18, 2017. During this period, the research team has made the following accomplishments: designed and layout a silica photonic integrated circuit (PIC) as a two baselineinterferometric imager; constructed an experiment to utilize the two baselines for complex visibility measurementon a point source and a variable width slit; analyzed and studied the testbed results (in collaboration with Lockheed Martin); designed and layout Si3N4 PICs for the low-resolution and high-resolution SPIDER (Segmented Planar Imaging Detector for Electro-Optical Reconnaissance) telescope; fabricated the multi-layer Si3N4 PIC for low and high resolution SPIDER telescope; characterized the optical throughput and heater response for Si3N4 PIC for low and highresolution SPIDER telescopes; carried out imaging experiments using the Si3N4 PIC low-resolution version (in collaboration with Lockheed Martin); investigated signal-to-noise (SNR) ratio of SPIDER imager compared to the conventional panchromatic imager (in collaboration with Lockheed Martin); fulfilled the SNR simulation upon SPIDER imager (in collaboration with Lockheed Martin).

Yoo, S. J. Ben↗

NASA NTRS2014

Low-Mass Planar Photonic Imaging Sensor

Continuing on the successful progress of NIAC Phase I, this report summarizes the technical progress achieved under NIAC Phase II during the performance period September 19, 2014-June 18, 2017. During this period, the research team has made the following accomplishments: designed and layout a silica photonic integrated circuit (PIC) as a two baseline interferometric imager; constructed an experiment to utilize the two baselines for complex visibility measurement on a point source and a variable width slit; analyzed and studied the testbed results. (in collaboration with Lockheed Martin); designed and layout Si3N4 PICs for the low-resolution and high-resolution SPIDER telescope; fabricated the multi-layer Si3N4 PIC for low and high resolution SPIDER telescope; characterize the optical throughput and heater response for Si3N4 PIC for low and high resolution SPIDER telescopes; carried out imaging experiments using the Si3N4 PIC low-resolution version (in collaboration with Lockheed Martin); investigated signal-to-noise (SNR) ratio of SPIDER imager compared to the conventional panchromatic imager (in collaboration with Lockheed Martin); fulfilled the SNR simulation upon SPIDER imager (in collaboration with Lockheed Martin).

Yoo, S. J. Ben↗