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Zhang, Ruizhe

Publications and source records attributed to Zhang, Ruizhe.

8 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Quantum Multiple Eigenvalue Gaussian filtered Search: an efficient and versatile quantum phase estimation method

Quantum phase estimation is one of the most powerful quantum primitives. This work proposes a new approach for the problem of multiple eigenvalue estimation: Quantum Multiple Eigenvalue Gaussian filtered Search (QMEGS). QMEGS leverages the Hadamard test circuit structure and only requires simple classical postprocessing. QMEGS is the first algorithm to simultaneously satisfy the following two properties: (1) It can achieve the Heisenberg-limited scaling without relying on any spectral gap assumption. (2) With a positive energy gap and additional assumptions on the initial state, QMEGS can estimate all dominant eigenvalues to ϵ accuracy utilizing a significantly reduced circuit depth compared to the standard quantum phase estimation algorithm. In the most favorable scenario, the maximal runtime can be reduced to as low as log(1/ϵ). This implies that QMEGS serves as an efficient and versatile approach, achieving the best-known results for both gapped and gapless systems. Numerical results validate the efficiency of our proposed algorithm in various regimes.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2024

Output Capacitance Loss of GaN HEMTs in Steady-State Switching

The output capacitance (C OSS ) loss, a loss produced when the device’s output capacitor is charged and discharged, has become a concern for GaN high electron mobility transistors (HEMTs) in high-frequency applications. This work presents a new, easy-to-implement method for the C OSS loss characterization based on the unclamped inductive switching (UIS) setup. As compared to prior approaches, this method involves the device’s ON-state conduction and could measure the C OSS loss in a single pulse and the steady-state switching. The C OSS loss of three types of mainstream commercial GaN HEMTs is characterized, which exhibit some common dependencies including a non-monotonic relation with the dv/dt (or resonance frequency), a linear relation with the ON-state current, a power-law relation with the peak blocking voltage, and little temperature dependence. In addition, their C OSS losses all show minimal distinctions in a single pulse and the steady-state switching, despite the increased on-resistance in the steady-state switching. Furthermore, this suggests that the traps accounting for the C OSS loss possess different de-trapping time constants as compared to the traps governing the dynamic on-resistance. Finally, a unified model is established to describe the C OSS loss of all three types of GaN HEMTs. These results provide important references for the high-frequency application of GaN HEMTs and new insights into the physical origin of their C OSS loss.1

42 ENGINEERING↗
DOE OSTI2023

Origin of Soft-Switching Output Capacitance Loss in Cascode GaN HEMTs at High Frequencies

Output capacitance (C OSS ) loss (E DISS ) is produced when the C OSS of a power device is charged and discharged, which ideally should be a lossless process. This loss was recently revealed to be a crucial concern for GaN high electron mobility transistors (HEMTs) in high-frequency soft-switching applications. Among various GaN devices, the composite-type, cascode GaN HEMT was reported to show the largest E DISS with a voltage dependence distinct from discrete GaN HEMTs. However, the physical origins of the EDISS in cascode GaN HEMTs remain unclear. This work fills this gap by identifying three loss components and, for the first time, experimentally quantifying them in the multi-MHz resonant switching. These loss components include a) the avalanche loss of Si MOSFET, b) the intrinsic E DISS of GaN HEMT, and c) the Si avalanche-induced GaN turn-ON loss. The last component was found to dominate E DISS at high voltage. By eliminating the Si avalanche and the associated loss components (a) and (c), the E DISS of cascode GaN HEMTs can be reduced by up to 75% at the price of an increase in output charge and switching transition time. Furthermore, these results provide new physical insights and practical guidelines to trim the soft-switching loss of cascode GaN HEMTs in high-frequency applications.

42 ENGINEERING↗
DOE OSTI2023

1 kV GaN-on-Si Quasi-Vertical Schottky Rectifier

Here, this work demonstrates quasi-vertical GaN Schottky barrier diodes (SBDs) on 6-inch Si substrate with a breakdown voltage (BV) over 1 kV, the highest BV reported in vertical GaN-on-Si SBDs to date. The deep mesa inherently in quasi-vertical devices is leveraged to form a self-aligned edge termination, and the mesa sidewall is covered by the p-type nickel oxide (NiO) as a reduced surface field (RESURF) structure. This novel termination enables a parallel-plane junction electric field of 2.8 MV/cm. The device also shows low turn-on voltage of 0.5 V, and low specific on-resistance of 1.1 mΩ∙ cm 2 . Moreover, the device exhibits excellent overvoltage robustness under the continuous 800 V stress in the unclamped inductive switching test. These results show the good promise of the low-cost vertical GaN-on-Si power diodes.

42 ENGINEERING↗
DOE OSTI2021

True Breakdown Voltage and Overvoltage Margin of GaN Power HEMTs in Hard Switching

This work studies the dynamic breakdown voltage (BV) and overvoltage margin of a 650-V-rated commercial GaN power HEMT in hard switching. The dynamic BV measured in the hard switching circuits is over 1.4 kV, being 450 V higher than the static BV measured in the quasi-static I-V sweep. The device can survive at least 1 million hard-switching overvoltage pulses with 1.33 kV peak overvoltage (~95% dynamic BV). Recoverable device parametric shifts are observed after the 1-million pulses, featuring small reductions in threshold voltage and on-resistance. These shifts are different from the ones after the hard-switching pulses without overvoltage and are attributable to the trapping of the holes produced in impact ionization. Furthermore, these results suggest that the BV and overvoltage margin of GaN HEMTs in practical power switching can be significantly underestimated using the static BV. Index Terms— GaN, HEMT, power electronics, hard switching, breakdown voltage, overvoltage, ruggedness, reliability.

42 ENGINEERING↗
DOE OSTI2020

( Invited ) Ruggedness of SiC and GaN Power Transistors in Switching Based Tests

Currently, a spectrum of reliability tests are being performed by both device manufacturers and end users. Many of these qualification tests are operated within the device safe-operating-area (SOA), however, the devices often undergo dynamic events in many converter applications that can exceed the SOA boundaries. This paper presents our recent work on quantifying the out-of-SOA robustness of GaN power high-electron-mobility transistors (HEMTs) and SiC power MOSFETs by switching based tests. The unclamped inductive switching stresses are applied to p-gate GaN HEMTs to evaluate their surge-energy and overvoltage robustness. The continuous, hard-switching, turn-off stresses are applied to SiC MOSFETs to evaluate their overvoltage switching robustness. As a result, both experiments demonstrate the robustness of SiC and GaN devices under out-of-SOA switching events, and the physics of degradation and failure are understood.

42 ENGINEERING↗
DOE OSTI2020

Surge-Energy and Overvoltage Ruggedness of P-Gate GaN HEMTs

An essential ruggedness of power devices is the capability of safely withstanding the surge energy. The surge ruggedness of the GaN high-electron-mobility transistor (HEMT), a power transistor with no or minimal avalanche capability, has not been fully understood. This article unveils the comprehensive physics associated with the surge-energy withstand process and the failure mechanisms of p-gate GaN HEMTs. Two commercial p-gate GaN HEMTs with Ohmic- and Schottky-type gate contacts are studied. Two circuits are developed to study the device surge ruggedness: an unclamped inductive switching circuit is first used to identify the withstand dynamics and failure mechanisms, and a clamped inductive switching circuit with a controllable parasitic inductance is then designed to mimic the surge energy in converter-like switching events. The p-gate GaN HEMT is found to withstand the surge energy through a resonant energy transfer between the device capacitance and the load/parasitic inductance rather than a resistive energy dissipation as occurred in the avalanche. If the device resonant voltage goes below zero, the device reversely turns on and the inductor is discharged. The device failure occurs at the transient of peak resonant voltage and is limited by the device overvoltage capability rather than the surge energy, dV/dt , or overvoltage duration. Almost no energy is dissipated in the resonant withstand process and the device failure is dominated by an electric field rather than a thermal runaway. Furthermore, these results provide critical understandings on the ruggedness of GaN HEMTs and important references for their qualifications and applications.

42 ENGINEERING↗