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Zhang, Zichen

Publications and source records attributed to Zhang, Zichen.

9 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

A Low-Profile Gate Power Supply for a SiC Phase Leg with Reduced Isolation Capacitance

Gate driver power supply (GDPS) for SiC devices needs power to 5 W as the switching frequency increases to hundreds of kHz. Resonant converters with planar magnetics demand GDPS with a lower profile. Also, the isolation capacitance (Cp) needs to be minimized for SiC devices with high dv/dt. This paper proposed a planar 5 W*2, 20 V isolated gate power supply for a SiC phase leg in the EV traction inverter. Air-core magnetics with PCB windings are applied for low profile. A single-switch resonant Class-E topology is proposed with zero-voltage switching at 6.78 MHz to minimize the magnetics footprint for a 6 pF Cp. Compared with commercial power supplies with similar power, the proposed power supply reduced the profile and Cp by more than half without sacrificing its efficiency and power density.

Li, Bo↗
DOE OSTI2024

Double-Side Cooled 1.2kV, 300A SiC MOSFET Phase-leg Modules for 200 kW, > 100 kW/L Traction Inverters

The packaging of a double-side cooled 1.2 kV, 149 A SiC phase-leg modules has been reported in recent years for making 100 kW, 100 kW/L traction inverters. Each phase-leg module consists of two SiC MOSFETs, one per switch position. Six of the phase-leg modules are assembled into a segmented inverter configuration to meet the power and power density requirement. In this work, the layout of the phase-leg module was redesigned to include four of the SiC MOSFETs, two per switch position, with the aim of doubling the power to 200 kW and increasing the power density beyond 100 kW/L, but with only a 10.25% footprint increase. Key features of the packaging technology developed in the previous work were implemented in the current work, which include silver sintering for chip bonding and porous silver inter-posts for bonding device source pads to substrate. Parasitic extraction simulation showed that the four-chip module has a low parasitic inductance of 4.7 nH, like the two-chip module. Static characterization of the four-chip prototypes showed a low average on-resistance of 9 mΩ and a low average leakage current of 5 nA at Vds of 1.2 kV.

Zhang, Zichen↗
DOE OSTI2023

Effects of Encapsulant Properties on the Thermo-Mechanical Reliability of Double-Side Cooled Power Modules for Traction Inverters

Double-side cooled power modules are being developed for next-generation traction inverters due to their better heat extraction, lower profile, and lower parasitic inductances. However, due to their rigid structure, they cause reliability concerns arising from high thermo-mechanical stresses at the interconnection joints in the module. In this work, a materials-based approach using rigid encapsulants is presented for reducing thermo-mechanical fatigue. Finite-element thermo- mechanical simulations were performed to examine the effects of the elastic modulus and coefficient of thermal expansion of epoxy- based encapsulants on the bond deformation inside a double-side cooled power module. It was found that a rigid encapsulant with a high modulus of 6.0 GPa or above and a coefficient of thermal expansion around 20 ppm/oC would improve the thermo- mechanical reliability of double-side cooled power modules by decreasing the permanent bond deformation inside the modules by 50-60%.

ADVANCED PROPULSION SYSTEMS↗
DOE OSTI2021

Packaging of an 8-kV Silicon Carbide Diode Module with Double-Side Cooling and Sintered-Silver Joints

Packaging innovations are needed for medium-voltage wide bandgap power semiconductor modules to enable their adaptation in grid applications. A unique challenge for packaging medium-voltage power modules is managing the trade-off between insulation demand and heat dissipation. The focus of this work was on developing a packaging innovation that improves the module heat dissipation and offers more flexibility to its insulation design. Two strategies were explored for the packaging of an 8-kV SiC diode rectifier module:(1) double-side cooling and (2) sintered-silver bonding. Double-side cooling was realized by using short metal posts rather than long and thin wire bonds for device interconnection, forming a low-profile package with devices sandwiched between two insulated metal substrates. Sintered-silver bonding enabled the devices to function reliably at over 250 °C. Simulations of the packaged module showed a low interconnect inductance of 2.67 nH and a 50% less heat transfer coefficient required to cool the chips. Prototypes of the module were fabricated, and preliminary electrical testing results validated the package design.

27 ARPA - Advanced Research Projects Agency-Energy↗