TY  - RPRT
TI  - Fail-Safe Logic Design Strategies within Modern FPGA Architectures.
AU  - Suchanek, Andrew
AU  - Mannos, Tom
AU  - Pluquellic, James
AU  - Bal, Anindya
PY  - 2022
UR  - https://www.osti.gov/biblio/2005338
ID  - 2005338
ER  -