NASA NTRS · 19650000273
Improved circuit minimizes generation time of pseudonoise check bits
Abstract
Computer switching network consists of parallel and series combinations of mod 2 adders using the minimum number of gating levels. This network minimizes the propagation time in which a sequence of pseudonoise check bits are generated.
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Anderson, T. O., Lusbaugh, W. A.. 1965-09-01. Improved circuit minimizes generation time of pseudonoise check bits. https://ntrs.nasa.gov/citations/19650000273
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