DALG: A program for test pattern generation in combinational logical circuits

Abstract

A user's manual for a computer program DALG which generates test patterns for detecting faults in combinational logic circuits containing up to 200 logical gates is presented. The gates may be of logical types AND, OR, NAND, NOR, NOT, or Exclusive OR is presented. The faults may be any one gate or input struck at a fixed value (0 or 1). In addition to test pattern generation DALG will also determine whether or not the given test pattern will detect given faults in a circuit. Sample problems are given along with input data sheets and printed output to illustrate the capabilities of the program.