A very high speed hard decision sequential decoder.

Abstract

Description of a 40-Mbps hard-decision sequential decoder for high-data-rate coding systems for earth-orbiting space missions with power-limited links. A prototype decoder has been designed and fabricated using the fastest commercially available digital integrated circuits, MECL III. Thus far, an internal computational rate of 70 million computations per second has been achieved. Computational efficiency of the decoding algorithm was greatly improved by incorporating two modifications to the Fano algorithm - 'double quick threshold loosening' and 'diagonal steps.' Preliminary results indicate that an output error rate of 0.00001 can be achieved with E sub b/N sub zero less than 5.4 dB at data rates up to 40 Mbps. At lower data rates, even less signal energy is required. This decoder is believed to be at least five times faster than any previous sequential decoder.